Péter Szolgay

Publication Activity (10 Years)

Years Active: 1992-2022
Publications (10 Years): 4

Top Topics

Wearable Computing

Scale Invariant Feature Transform

Boolean Operators

Top Venues

Publications

Attila Fejér, Zoltán Nagy, Jenny Benois-Pineau, Péter Szolgay, Aymar de Rugy, Jean-Philippe Domenger
Hybrid FPGA-CPU-Based Architecture for Object Recognition in Visual Servoing of Arm Prosthesis. J. Imaging 8 (2) (2022)
Attila Fejer, Zoltán Nagy, Jenny Benois-Pineau, Péter Szolgay, Aymar de Rugy, Jean-Philippe Domenger
Implementation of Scale Invariant Feature Transform detector on FPGA for low-power wearable devices for prostheses control. Int. J. Circuit Theory Appl. 49 (7) (2021)
Attila Fejer, Zoltán Nagy, Jenny Benois-Pineau, Péter Szolgay, Aymar de Rugy, Jean-Philippe Domenger
FPGA-based SIFT implementation for wearable computing. DDECS (2019)
Péter Szolgay
In memory of Tamás Roska (1940-2014). ICECS (2017)
Vamsi Kiran Adhikarla, Jaka Sodnik, Péter Szolgay, Grega Jakus
Exploring Direct 3D Interaction for Full Horizontal Parallax Light Field Displays Using Leap Motion Controller. Sensors 15 (4) (2015)
Ákos Zarándy, Csaba Rekeczky, Péter Szolgay, Leon O. Chua
Overview of CNN research: 25 years history and the current trends. ISCAS (2015)
Bence J. Borbely, Attila Tihanyi, Péter Szolgay
A measurement system for wrist movements in biomedical applications. ECCTD (2015)
Endre László, Zoltán Nagy, Michael B. Giles, István Z. Reguly, Jeremy Appleyard, Péter Szolgay
Analysis of parallel processor architectures for the solution of the Black-Scholes PDE. ISCAS (2015)
András Kiss, Zoltán Nagy, Péter Szolgay, György Csaba, Xiaobo Sharon Hu, Wolfgang Porod
Emulating massively parallel non-Boolean operators on FPGA. ISCAS (2015)
Csaba Nemes, Gergely Barcza, Zoltán Nagy, Örs Legeza, Péter Szolgay
The density matrix renormalization group algorithm on kilo-processor architectures: Implementation and trade-offs. Comput. Phys. Commun. 185 (6) (2014)
Zoltán Nagy, Csaba Nemes, Antal Hiba, Árpád Csík, András Kiss, Miklós Ruszinkó, Péter Szolgay
Accelerating unstructured finite volume computations on field-programmable gate arrays. Concurr. Comput. Pract. Exp. 26 (3) (2014)
Zoltán Nagy, Csaba Nemes, Antal Hiba, Árpád Csík, András Kiss, Miklós Ruszinkó, Péter Szolgay
Accelerating unstructured finite volume computations on field-programmable gate arrays. CoRR (2014)
Norbert Sarkany, György Cserey, Péter Szolgay
An introduction of the biomimetic hand testbed: Skeletal structure and actuation. ROSE (2013)
Csaba Nemes, Gergely Barcza, Zoltán Nagy, Ors Legeza, Péter Szolgay
Implementation trade-offs of the density matrix renormalization group algorithm on kilo-processor architectures. ECCTD (2013)
Bence J. Borbely, Péter Szolgay
Estimating the instantaneous wrist flexion angle from multi-channel surface EMG of forearm muscles. BioCAS (2013)
Bence J. Borbely, Zoltán Kincses, Zsolt Vörösházi, Zoltán Nagy, Péter Szolgay
Analysis of myoelectric signals using a Field Programmable SoC. ECCTD (2013)
András Kiss, Zoltán Nagy, Péter Szolgay, Tamás Roska, György Csaba, Xiaobo Sharon Hu, Wolfgang Porod
FPGA-implementation of a holographic pattern-matching algorithm. ECCTD (2013)
Zoltán Nagy, Csaba Nemes, Antal Hiba, András Kiss, Árpád Csík, Péter Szolgay
FPGA based acceleration of computational fluid flow simulation on unstructured mesh geometry. FPL (2012)
Csaba Nemes, Zoltán Nagy, Péter Szolgay
Efficient mapping of mathematical expressions to FPGAs: Exploring different design methodologies. ECCTD (2011)
Zoltán Kincses, László Orzó, Zoltán Nagy, György Mezo, Péter Szolgay
High-Speed, SAD Based Wavefront Sensor Architecture Implementation on FPGA. J. Signal Process. Syst. 64 (3) (2011)
Sándor Kocsárdi, Zoltán Nagy, Árpád Csík, Péter Szolgay
Simulation of 2D inviscid, adiabatic, compressible flows on emulated digital CNN-UM. Int. J. Circuit Theory Appl. 37 (4) (2009)
Laszlo Furedi, Péter Szolgay
CNN model on stream processing platform. ECCTD (2009)
Zoltán Kincses, Zoltán Nagy, László Orzó, Péter Szolgay, György Mezo
Implementation of a parallel SAD based wavefront sensor architecture on FPGA. ECCTD (2009)
Zsolt Vörösházi, Zoltán Nagy, Péter Szolgay
FPGA-Based Real Time, Multichannel Emulated-Digital Retina Model Implementation. EURASIP J. Adv. Signal Process. 2009 (2009)
Alexandru Gacsádi, Péter Szolgay
Variational computing based images denoising methods by using cellular neural networks. ECCTD (2009)
Sándor Kocsárdi, Zoltán Nagy, Árpád Csík, Péter Szolgay
Simulation of Two-Dimensional Supersonic Flows on Emulated-Digital CNN-UM. EURASIP J. Adv. Signal Process. 2009 (2009)
Norbert Bérci, Péter Szolgay
Towards a Gesture based Human-machine Interface: Fast 3D Tracking of the Human Fingers on High Speed Smart Camera Computers. ISCAS (2009)
Zoltán Nagy, László Kék, Zoltán Kincses, András Kiss, Péter Szolgay
Toward exploitation of cell multi-processor array in time-consuming applications by using CNN model. Int. J. Circuit Theory Appl. 36 (5-6) (2008)
Sándor Kocsárdi, Zoltán Nagy, Árpád Csík, Péter Szolgay
Supersonic Flow Simulation on Emulated Digital Cellular Neural Networks. ERCIM News 2008 (74) (2008)
Zsolt Vörösházi, András Kiss, Zoltán Nagy, Péter Szolgay
Implementation of embedded emulated-digital CNN-UM global analogic programming unit on FPGA and its application. Int. J. Circuit Theory Appl. 36 (5-6) (2008)
Zoltán Nagy, László Kék, Zoltán Kincses, András Kiss, Péter Szolgay
Exploitation of Cell Multi-Processor Array in Solution of Spatio-Temporal Dynamics. ERCIM News 2008 (74) (2008)
Péter Sonkoly, István Noé, José M. Carcione, Zoltán Nagy, Péter Szolgay
CNN-UM based transversely isotropic elastic wave propagation simulation. ECCTD (2007)
Zoltán Nagy, László Kék, Zoltán Kincses, Péter Szolgay
CNN model on cell multiprocessor array. ECCTD (2007)
Sándor Kocsárdi, Zoltán Nagy, Péter Szolgay
Emulated digital CNN solution for two dimensional compressible flows. ECCTD (2007)
Norbert Bérci, Péter Szolgay
Vision based human-machine interface via hand gestures. ECCTD (2007)
Attila Kis, Ferenc Kovács, Péter Szolgay
3D tactile sensor array processed by CNN-UM: a fast method for detecting and identifying slippage and twisting motion. Int. J. Circuit Theory Appl. 34 (4) (2006)
Zoltán Nagy, Zsolt Vörösházi, Péter Szolgay
An advanced emulated digital retina model on FPGA to implement a real-time test environment. ISCAS (2006)
Zoltán Nagy, Zsolt Vörösházi, Péter Szolgay
Emulated digital CNN-UM solution of partial differential equations. Int. J. Circuit Theory Appl. 34 (4) (2006)
Ákos Zarándy, Péter Földesy, Péter Szolgay, Szabolcs Tõkés, Csaba Rekeczky, Tamás Roska
Various implementations of topographic, sensory, cellular wave computers. ISCAS (6) (2005)
Péter Sonkoly, Sándor Kocsárdi, Péter Kozma, Péter Szolgay
Inverse elastic wave propagation modeling on CNN-UM architecture. ECCTD (2005)
Timót Hidvégi, Péter Keresztes, Péter Szolgay
Enhanced Emulated Digital CNN-UM (CASTLE) Arithmetic Cores. J. Circuits Syst. Comput. 12 (6) (2003)
Tamás Szabó, Júlia Góth, Sándor Dominich, György Kozmann, Péter Szolgay, Péter Bársony
Novel Neuroradiological Image Processing and Information Retrieval in a Telestroke System. MIE (2003)
Zoltán Nagy, Péter Szolgay
Configurable multi-layer CNN-UM emulator on FPGA using distributed arithmetic. ICECS (2002)
Timót Hidvégi, Péter Szolgay
Some new analogic CNN algorithms for PCB quality control. Int. J. Circuit Theory Appl. 30 (2-3) (2002)
Péter Kozma, Balázs Kránicz, Péter Szolgay
Colour space transformation, colour correction and exact colour reproduction with CNN technology. ICECS (2002)
Timót Hidvégi, Péter Szolgay
Short Circuit Detection on Printed Circuit Boards during the Manufacturing Process by Using an Analogic CNN Algorithm. IEA/AIE (2001)
Péter Szolgay, Katalin Tömördi
Analogic algorithms for optical detection of breaks and short circuits on the layouts of printed circuit boards using CNN. Int. J. Circuit Theory Appl. 27 (1) (1999)
Péter Keresztes, Ákos Zarándy, Tamás Roska, Péter Szolgay, Tamás Bezák, Timót Hidvégi, Péter Jónás, Attila Katona
An Emulated Digital CNN Implementation. J. VLSI Signal Process. 23 (2-3) (1999)
Ákos Zarándy, Péter Keresztes, Tamás Roska, Péter Szolgay
CASTLE: an emulated digital CNN architecture; design issues, new results. ICECS (1998)
Rafael Domínguez-Castro, Servando Espejo, Ángel Rodríguez-Vázquez, Ricardo Carmona, Péter Földesy, Ákos Zarándy, Péter Szolgay, Tamás Szirányi, Tamás Roska
A 0.8-μm CMOS two-dimensional programmable mixed-signal focal-plane array processor with on-chip binary imaging and instructions storage. IEEE J. Solid State Circuits 32 (7) (1997)
Péter L. Venetianer, Péter Szolgay, Kenneth R. Crounse, Tamás Roska, Leon O. Chua
Analogue Combinatorics and Cellular Automata - Key Algorithms and Lay-out Design. Int. J. Circuit Theory Appl. 24 (1) (1996)
Attila Katona, Péter Szolgay
On some Limits of XILINX Based Control Logic Implementations. FPL (1994)
Tamás Roska, Gusztáv Bártfai, Péter Szolgay, Tamás Szirányi, András Radványi, Tibor Kozek, Z. S. Ugray, Ákos Zarándy
A digital multiprocessor hardware accelerator board for cellular neural networks: CNN-HAC. Int. J. Circuit Theory Appl. 20 (5) (1992)
Péter Szolgay
On algorithms in the parallel design of logic and layout of circuits with functional blocks. Int. J. Circuit Theory Appl. 20 (4) (1992)