Naushad Alam

Publication Activity (10 Years)

Years Active: 2009-2024
Publications (10 Years): 19

Top Topics

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Microelectron. J.

Publications

Naushad Alam, Yvette Graham, Cathal Gurrin
Memento 4.0: A Prototype Conversational Search System for LSC'24. LSC@ICMR (2024)
Naushad Alam, Yvette Graham, Cathal Gurrin
Memento 3.0: An Enhanced Lifelog Search Engine for LSC'23. LSC@ICMR (2023)
Ly-Duyen Tran, Manh-Duy Nguyen, Duc-Tien Dang-Nguyen, Silvan Heller, Florian Spiess, Jakub Lokoc, Ladislav Peska, Thao-Nhu Nguyen, Omar Shahbaz Khan, Aaron Duane, Björn Þór Jónsson, Luca Rossetto, An-Zi Yen, Ahmed Alateeq, Naushad Alam, Minh-Triet Tran, Graham Healy, Klaus Schoeffmann, Cathal Gurrin
Comparing Interactive Retrieval Approaches at the Lifelog Search Challenge 2021. IEEE Access 11 (2023)
Naushad Alam, Yvette Graham
Memento: a prototype search engine for LSC 2021. Multim. Tools Appl. 82 (24) (2023)
Ly-Duyen Tran, Naushad Alam, Yvette Graham, Linh Khanh Vo, Nghiem Tuong Diep, Binh Nguyen, Liting Zhou, Cathal Gurrin
An Exploration into the Benefits of the CLIP model for Lifelog Retrieval. CBMI (2022)
Naushad Alam, Yvette Graham, Cathal Gurrin
Memento 2.0: An Improved Lifelog Search Engine for LSC'22. LSC@ICMR (2022)
Naushad Alam, Yvette Graham, Cathal Gurrin
Memento: A Prototype Lifelog Search Engine for LSC'21. LSC@ICMR (2021)
Sayeed Ahmad, Naushad Alam, Mohd. Hasan
Radiation Hardened Area-Efficient 10T SRAM Cell for Space Applications. VDAT (2021)
Mohd Yasir, Naushad Alam
Design of CNTFET-Based CCII Using gm/ID Technique for Low-Voltage and Low-Power Applications. J. Circuits Syst. Comput. 29 (9) (2020)
Salwa Yasmeen Neyaz, Itisha Saxena, Naushad Alam, Syed Atiqur Rahman
FPGA and ASIC Implementation and Comparison of Multipliers. ISDCS (2020)
Syed Afzal Ahmad, Naushad Alam
Suppression of ambipolarity in tunnel-FETs using gate oxide as parameter: analysis and investigation. IET Circuits Devices Syst. 14 (3) (2020)
Mohd Adil Raushan, Naushad Alam, Mohd Jawaid Siddiqui
Design approach to improve the performance of JAMFETs. IET Circuits Devices Syst. 14 (3) (2020)
Ahmed Shaban, Sayeed Ahmad, Naushad Alam, Mohd. Hasan
Compact and Low Power 11T-2MTJ Non-Volatile Ternary Content Addressable Memory Cell with High Sense Margin. J. Low Power Electron. 15 (2) (2019)
Mohd Adil Raushan, Naushad Alam, Mohd Jawaid Siddiqui
Pocket engineered electrostatically doped tunnel field effect transistor. TENCON (2019)
Ahmed Shaban, Sayeed Ahmad, Naushad Alam, Mohd. Hasan
Compact and Reliable Low Power Non-Volatile TCAM Cell. ISED (2018)
Arvind Kumar Sharma, Naushad Alam, Anand Bulusu
UTBB FD-SOI Circuit Design using Multifinger Transistors: A Circuit-Device Interaction Perspective. PRIME (2018)
Sayeed Ahmad, Mohit Kumar Gupta, Naushad Alam, Mohd. Hasan
Low Leakage Single Bitline 9 T (SB9T) Static Random Access Memory. Microelectron. J. 62 (2017)
Baljit Kaur, Arvind Kumar Sharma, Naushad Alam, S. K. Manhas, Bulusu Anand
A variation aware timing model for a 2-input NAND gate and its use in sub-65 nm CMOS standard cell characterization. Microelectron. J. 53 (2016)
Sayeed Ahmad, Mohit Kumar Gupta, Naushad Alam, Mohd. Hasan
Single-Ended Schmitt-Trigger-Based Robust Low-Power SRAM Cell. IEEE Trans. Very Large Scale Integr. Syst. 24 (8) (2016)
Arvind Kumar Sharma, Neeraj Mishra, Naushad Alam, Sudeb Dasgupta, Anand Bulusu
Pre-layout estimation of performance and design of basic analog circuits in stress enabled technologies. VDAT (2015)
Mohammad Shueb Romi, Naushad Alam, Mohd Yusuf Yasin
An analytical delay model for CMOS Inverter-Transmission Gate structure. VDAT (2014)
Baljit Kaur, Naushad Alam, S. K. Manhas, Bulusu Anand
Efficient ECSM Characterization Considering Voltage, Temperature, and Mechanical Stress Variability. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2014)
Naushad Alam, Bulusu Anand, Sudeb Dasgupta
An Analytical Delay Model for Mechanical Stress Induced Systematic Variability Analysis in Nanoscale Circuit Design. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2014)
Naushad Alam, Bulusu Anand, Sudeb Dasgupta
The impact of process-induced mechanical stress in narrow width devices and variable-taper CMOS buffer design. Microelectron. Reliab. 53 (5) (2013)
Naushad Alam, Bulusu Anand, Sudeb Dasgupta
The impact of process-induced mechanical stress on CMOS buffer design using multi-fingered devices. Microelectron. Reliab. 53 (3) (2013)
Naushad Alam, Bulusu Anand, Sudeb Dasgupta
Impact of Dummy Poly on the Process-Induced Mechanical Stress Enhanced Circuit Performance. VDAT (2012)
Naushad Alam, Bulusu Anand, Sudeb Dasgupta
The Impact of Process-Induced Mechanical Stress in Narrow Width Devices and Circuit Design Issues. ISED (2012)
Naushad Alam, Bulusu Anand, Sudeb Dasgupta
Process induced mechanical stress aware poly-pitch optimization for enhanced circuit performance. ISQED (2012)
Abdul Kadir Kureshi, Naushad Alam, Mohd. Hasan, Tughrul Arslan
Subthreshold Deep Submicron Performance Investigation of CMOS and DTCMOS Biasing Schemes for Reconfigurable Computing. ISCAS (2009)
Naushad Alam, Abdul Kadir Kureshi, Mohd. Hasan, Tughrul Arslan
Carbon Nanotube Interconnects for Low-power High-speed Applications. ISCAS (2009)