N. Moorthy Muthukrishnan

Publication Activity (10 Years)

Years Active: 2010-2018
Publications (10 Years): 1

Top Topics

Power Reduction

Average Precision

Design Decisions

Top Venues

Publications

Madhuri Bayya, U. M. Rao, BVVSN Prabhakara Rao, N. Moorthy Muthukrishnan
Comparison of Voltage Charging Techniques to Increase the Life of Lead Acid Batteries. iSES (2018)
Chetan Vudadha, P. Sai Phaneendra, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, Mandalika B. Srinivas
Design and Analysis of Reversible Ripple, Prefix and Prefix-Ripple Hybrid Adders. ISVLSI (2012)
Chetan Vudadha, P. Sai Phaneendra, Sreehari Veeramachaneni, Syed Ershad Ahmed, N. Moorthy Muthukrishnan, Mandalika B. Srinivas
Design of Prefix-Based Optimal Reversible Comparator. ISVLSI (2012)
Chetan Vudadha, Goutham Makkena, M. Venkata Swamy Nayudu, P. Sai Phaneendra, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas
Low-Power Self Reconfigurable Multiplexer Based Decoder for Adaptive Resolution Flash ADCs. VLSI Design (2012)
Syed Ershad Ahmed, Sibi Abraham, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas
A Modified Twin Precision Multiplier with 2D Bypassing Technique. ISED (2012)
Mahesh Kumar Adimulam, Krishna Kumar Movva, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas
A Multiple-Bandwidth 10-bit SAR Analog to Digital Converter. ISED (2011)
Chetan Kumar V., Sai Phaneendra P., Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas
A Prefix Based Reconfigurable Adder. ISVLSI (2011)
Chetan Kumar V., P. Sai Phaneendra, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas
A Unified Architecture for BCD and Binary Adder/Subtractor. DSD (2011)
P. Sai Phaneendra, Chetan Vudadha, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas
Increment/decrement/2's complement/priority encoder circuit for varying operand lengths. ISCIT (2011)
Chetan Kumar V., P. Sai Phaneendra, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas
A Reconfigurable INC/DEC/2's Complement/Priority Encoder Circuit with Improved Decision Block. ISED (2011)
Mahesh Kumar Adimulam, Krishna Kumar Movva, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, Mandalika B. Srinivas
Low power, variable resolution pipelined analog to Digital converter with sub flash architecture. APCCAS (2010)
Mahesh Kumar Adimulam, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas
A Novel, Variable Resolution Flash ADC with Sub Flash Architecture. ISVLSI (2010)
Mahesh Kumar Adimulam, Krishna Kumar Movva, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas
A low power, variable resolution two-step flash ADC. ACM Great Lakes Symposium on VLSI (2010)