A Prefix Based Reconfigurable Adder.
Chetan Kumar V.Sai Phaneendra P.Syed Ershad AhmedSreehari VeeramachaneniN. Moorthy MuthukrishnanM. B. SrinivasPublished in: ISVLSI (2011)
Keyphrases
- bit parallel
- data flow
- systolic array
- data structure
- low cost
- reconfigurable architecture
- pattern matching
- hardware implementation
- general purpose
- prefix tree
- multi objective evolutionary
- regular expressions
- tree structure
- data model
- artificial intelligence
- fine grain
- genetic algorithm
- database
- heterogeneous computing
- logic circuits
- smart camera
- field programmable gate array
- machine learning
- databases