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A Reconfigurable INC/DEC/2's Complement/Priority Encoder Circuit with Improved Decision Block.

Chetan Kumar V.P. Sai PhaneendraSyed Ershad AhmedSreehari VeeramachaneniN. Moorthy MuthukrishnanM. B. Srinivas
Published in: ISED (2011)
Keyphrases
  • power reduction
  • decision making
  • low cost
  • power consumption
  • bit rate
  • low power
  • general purpose
  • decision makers
  • circuit design
  • video sequences
  • rate distortion
  • decision process
  • block matching