Mohammad Sharifkhani

Publication Activity (10 Years)

Years Active: 2004-2024
Publications (10 Years): 27

Top Topics

Radio Frequency

Analog To Digital Converter

Automated Design

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Microelectron. J.

Publications

Amirreza Farahbakhsh, Seyedmehdi Hosseini, Sajjad Kachuee, Mohammad Sharifkhani
Rapid Emulation of Approximate DNN Accelerators. ISCAS (2024)
Sajjad Kachuee, Mohammad Sharifkhani
TiltedBERT: Resource Adjustable Version of BERT. CoRR (2022)
Mohammad Sadegh Alizadeh, Mohammad Sharifkhani
Compressed Domain Moving Object Detection Based on CRF. IEEE Trans. Circuits Syst. Video Technol. 30 (3) (2020)
Vala Sadrafshari, Shamin Sadrafshari, Mohammad Sharifkhani
Yield constrained automated design algorithm for power optimized pipeline ADC. Integr. 74 (2020)
Ata Khorami, Roghayeh Saeidi, Manoj Sachdev, Mohammad Sharifkhani
A low-power dynamic comparator for low-offset applications. Integr. 69 (2019)
Ata Khorami, Roghayeh Saeidi, Mohammad Sharifkhani, Nima Taherinejad
An Ultra Low-power Low-offset Double-tail Comparator. NEWCAS (2019)
Ata Khorami, Manoj Sachdev, Mohammad Sharifkhani
A Contention-free, Static, Single-phase Flip-Flop for Low Data Activity Applications. SoCC (2019)
Mohammad S. Eslampanah Sendi, Siavash Kananian, Mohammad Sharifkhani, Amir M. Sodagar
Temperature Compensation in CMOS Peaking Current References. IEEE Trans. Circuits Syst. II Express Briefs (9) (2018)
Ata Khorami, Mohammad Sharifkhani
A Low-Power High-Speed Comparator for Precise Applications. IEEE Trans. Very Large Scale Integr. Syst. 26 (10) (2018)
Shahaboddin Ghajari, Mohammad Sharifkhani
A Time-Interleaved 2b/Cycle SAR ADC with Background Offset Calibration. ISCAS (2018)
Amir Ahmad Mohammadi, Mohammad Sadegh Alizadeh, Mohammad Sharifkhani
JVET Encoder Complexity Analysis. ISCAS (2018)
Ata Khorami, Mohammad Sharifkhani
A low-power technique for high-resolution dynamic comparators. Int. J. Circuit Theory Appl. 46 (10) (2018)
Ata Khorami, Mohammad Sharifkhani
An Efficient Fast Switching Procedure for Stepwise Capacitor Chargers. IEEE Trans. Very Large Scale Integr. Syst. 25 (2) (2017)
Ali Asghar Razavi Haeri, Mohammadreza Ghaderi Karkani, Mohammad Sharifkhani, Mahmoud Kamarei, Ali Fotowat-Ahmady
Analysis and Design of Power Harvesting Circuits for Ultra-Low Power Applications. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2017)
Mohammad S. Eslampanah Sendi, Siavash Kananian, Elaheh Zendehrouh, Mohammad Sharifkhani, Amir M. Sodagar, Mahdi Shabany
A low-power temperature-compensated CMOS peaking current reference in subthreshold region. ISCAS (2017)
Ata Khorami, Mohammad Sharifkhani
Excess power elimination in high-resolution dynamic comparators. Microelectron. J. 64 (2017)
Ata Khorami, Mohammad Sharifkhani
An ultra low-power digital to analog converter for SAR ADCs. ICM (2017)
Narges Mousavi, Mohammad Sharifkhani, Mohsen Jalali
Ultra-low power current mode all- MOS ASK demodulator for radio frequency identification applications. IET Circuits Devices Syst. 10 (2) (2016)
Seyed Behnam Yazdani, Ata Khorami, Mohammad Sharifkhani
An accurate low-power DAC for SAR ADCs. MWSCAS (2016)
Mohammad Sadegh Alizadeh, Javad Bagherzadeh, Mohammad Sharifkhani
A Low-Latency QRD-RLS Architecture for High-Throughput Adaptive Applications. IEEE Trans. Circuits Syst. II Express Briefs (7) (2016)
Ata Khorami, Mohammad Sharifkhani
A high-speed method of dynamic comparators for SAR analog to digital converters. MWSCAS (2016)
Ata Khorami, Mohammad Sharifkhani
General Characterization Method and a Fast Load-Charge-Preserving Switching Procedure for the Stepwise Adiabatic Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2016)
Ata Khorami, Mohammad S. Eslampanah Sendi, Ali Nikoofard, Mohammad Sharifkhani
Zero-power mismatch-independent Digital to Analog converter. NEWCAS (2015)
Mohammad S. Eslampanah Sendi, Mohsen Judy, Hasan Molaei, Amir M. Sodagar, Mohammad Sharifkhani
Wireless interfacing to cortical neural recording implants using 4-FSK modulation scheme. ICECS (2015)
Ata Khorami, Mohammad Sharifkhani
Elimination of the effect of bottom-plate capacitors in C-2C DAC using a layout technique. Microelectron. J. 46 (12) (2015)
Ali Sadr, Nasser Masoumi, Mohammad Sharifkhani
Bandwidth enhancement of planar EBG structure using dissipative edge termination. NEWCAS (2015)
Seyed Mohammadreza Fatemi, Mohammad Sharifkhani, Ali Fotowat-Ahmady
A Unified Solution for Super-Regenerative Systems With Application to Correlator-Based UWB Transceivers. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2015)
Mohammad S. Eslampanah Sendi, Soraya Nasiri, Narges Mousavi, Mohammad Sharifkhani, Amir M. Sodagar
A 3-D inductive powering approach dedicated to implantable/wearable biomedical microsystems. BioCAS (2014)
Hani Esmaeelzadeh, Mohammad Sharifkhani, Mahdi Shabany
A low-power 10-Bit 40-MS/s pipeline ADC using extended capacitor sharing. ISCAS (2014)
Reza Ghanaatian, Mahdi Shabany, Mohammad Sharifkhani
An efficient high-throughput LSI architecture for a synchronization block applied to real-time optical OFDM systems. ISCAS (2014)
Hourieh Attarzadeh, Mohammad Sharifkhani
An auto-calibrated, dual-mode SRAM macro using a hybrid offset-cancelled sense amplifier. Microelectron. J. 45 (6) (2014)
Roghayeh Saeidi, Mohammad Sharifkhani, Khosrow Hajsadeghi
Statistical Analysis of Read Static Noise Margin for Near/Sub-Threshold SRAM Cell. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2014)
Mohsen Hassanpourghadi, Milad Zamani, Mohammad Sharifkhani
A low-power low-offset dynamic comparator for analog to digital converters. Microelectron. J. 45 (2) (2014)
Roghayeh Saeidi, Mohammad Sharifkhani, Khosrow Hajsadeghi
A Subthreshold Symmetric SRAM Cell With High Read Stability. IEEE Trans. Circuits Syst. II Express Briefs (1) (2014)
Mohammad Chahardori, Mohammad Sharifkhani, Sirus Sadughi
A 4-Bit, 1.6 GS/s Low Power Flash ADC, Based on Offset Calibration and Segmentation. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2013)
Mohammad Chahardori, Mohammad Sharifkhani, Sirus Sadughi
A low power 1.2 GS/s 4-bit flash ADC in 0.18 µm CMOS. EWDTS (2013)
Bahman Yousefzadeh, Ali Hajian, Mohammad Sharifkhani
A 10MHz CTDSM with differential VCO-based quantizer in 90nm. DTIS (2013)
Mohsen Hassanpourghadi, Mohammad Sharifkhani
Fast Static Characterization of Residual-Based ADCs. IEEE Trans. Circuits Syst. II Express Briefs (11) (2013)
Mohsen Hassanpourghadi, Mohammad Sharifkhani
Step response analysis of third order OpAmps With slew-rate. VLSI-SoC (2013)
Hamid R. Zarghi, Mohammad Sharifkhani, Iman Gholampour
Implementation of a cost efficient SSL based on an Angular beamformer SRP-PHAT. ICECS (2011)
Mohammad S. Eslampanah Sendi, Mohammad Sharifkhani, Amir M. Sodagar
CMOS-compatible structure for voltage-mode multiple-valued logic circuits. ICECS (2011)
Roghayeh Saeidi, Mohammad Sharifkhani, Khosrow Hajsadeghi
A subthreshold dynamic read SRAM (DRSRAM) based on dynamic stability criteria. ISCAS (2011)
Bahman Yousefzadeh, Mohammad Sharifkhani
An audio band low voltage CT-ΔΣ modulator with VCO-based quantizer. ICECS (2011)
Mohammad Sharifkhani, E. Rahiminejad, Shah M. Jahinuzzaman, Manoj Sachdev
A Compact Hybrid Current/Voltage Sense Amplifier With Offset Cancellation for High-Speed SRAMs. IEEE Trans. Very Large Scale Integr. Syst. 19 (5) (2011)
Mohammad Chahardori, Seyed Mojtaba Atarodi, Mohammad Sharifkhani
A sub 1 V high PSRR CMOS bandgap voltage reference. Microelectron. J. 42 (9) (2011)
Mohsen Hashemi, Mohammad Sharifkhani, Mohammad Gholami
A low power 1-V 10-bit 40-MS/s pipeline ADC. ICECS (2011)
Mohammad Gholami, Mohammad Sharifkhani, Saeed Saeedi
Modeling of DLL-based frequency multiplier in time and frequency domain with Matlab Simulink. APCCAS (2010)
Hourieh Attarzadeh, Mohammad Sharifkhani, Shah M. Jahinuzzaman
A scalable offset-cancelled current/voltage sense amplifier. ISCAS (2010)
Mohammad Sharifkhani, Manoj Sachdev
SRAM Cell Stability: A Dynamic Perspective. IEEE J. Solid State Circuits 44 (2) (2009)
Shah M. Jahinuzzaman, Mohammad Sharifkhani, Manoj Sachdev
An Analytical Model for Soft Error Critical Charge of Nanometric SRAMs. IEEE Trans. Very Large Scale Integr. Syst. 17 (9) (2009)
Mohammad Sharifkhani, Manoj Sachdev
An Energy Efficient 40 Kb SRAM Module With Extended Read/Write Noise Margin in 0.13 µm CMOS. IEEE J. Solid State Circuits 44 (2) (2009)
Shah M. Jahinuzzaman, Mohammad Sharifkhani, Manoj Sachdev
Investigation of Process Impact on Soft Error Susceptibility of Nanometric SRAMs Using a Compact Critical Charge Model. ISQED (2008)
Mohammad Sharifkhani, Shah M. Jahinuzzaman, Manoj Sachdev
Dynamic Data Stability in Low-power SRAM Design. CICC (2007)
Mohammad Sharifkhani, Manoj Sachdev
Segmented Virtual Ground Architecture for Low-Power Embedded SRAM. IEEE Trans. Very Large Scale Integr. Syst. 15 (2) (2007)
Mohammad Sharifkhani, Manoj Sachdev
A low power SRAM architecture based on segmented virtual grounding. ISLPED (2006)
Mohammad Sharifkhani, Manoj Sachdev
-Order ΔΣ Frequency Digitizer. CICC (2006)
Mohammad Sharifkhani, Manoj Sachdev
A phase-domain 2nd-order continuous time Delta-Sigma-modulator for frequency digitization. ISCAS (2006)
Mohammad Sharifkhani, Shah M. Jahinuzzaman, Manoj Sachdev
Dynamic Data Stability in SRAM Cells and Its Implications on Data Stability Tests. MTDT (2006)
Mohammad Sharifkhani
A frequency digitizer based on the continuous time phase domain noise shaping. ISCAS (1) (2004)