Mika Laiho

Publication Activity (10 Years)

Years Active: 2000-2020
Publications (10 Years): 8

Top Topics

Programmable Logic

Visual Analysis

Associative Memory

Recursive Functions

Top Venues

IEEE J. Emerg. Sel. Topics Circuits Syst.

Publications

Mika Grönroos, Ari Paasio, Mika Laiho
High-Dynamic-Range Image Reconstruction from Pixel-Level Self-Reset ADC Samples. ISCAS (2020)
Olli Lahdenoja, Tero Säntti, Jonne K. Poikonen, Mika Laiho, Ari Paasio, Joonas Pekkarinen, Antti Salminen
Embedded processing methods for online visual analysis of laser welding. J. Real Time Image Process. 16 (4) (2019)
Jussi H. Poikonen, Mika Laiho
A mixed-mode array computing architecture for online dictionary learning. ISCAS (2017)
Mika Laiho, Mika Grönroos, Jussi H. Poikonen, Eero Lehtonen, Reon Katsumura, Atsushi T.-Fukuchi, Masashi Arita, Yasuo Takahashi
Associative search using pseudo-analog memristors. ISCAS (2017)
Mika Laiho, Eero Lehtonen, Jussi H. Poikonen, Pentti Kanerva
Associative memory with occurrence statistics. ISCAS (2016)
Jussi H. Poikonen, Eero Lehtonen, Mika Laiho
Recursive functions in high-dimensional computing with random vectors. IJCNN (2016)
Jussi H. Poikonen, Mika Laiho, Eero Lehtonen, Timo Knuutila
Hidden Markov model inference in an Associative memory architecture. IJCNN (2016)
Lauri Koskinen, Jari Tissari, Jukka Teittinen, Eero Lehtonen, Mika Laiho, Jussi H. Poikonen
A Performance Case-Study on Memristive Computing-in-Memory Versus Von Neumann Architecture. DCC (2016)
Eero Lehtonen, Jussi H. Poikonen, Jari Tissari, Mika Laiho, Lauri Koskinen
Recursive Algorithms in Memristive Logic Arrays. IEEE J. Emerg. Sel. Topics Circuits Syst. 5 (2) (2015)
Mika Laiho, Jonne K. Poikonen, Eero Lehtonen, Mikko Pänkäälä, Jussi H. Poikonen, Pentti Kanerva
A 512×512-cell associative CAM/Willshaw memory with vector arithmetic. ISCAS (2015)
Mika Laiho, Jennifer O. Hasler, Jiantao Zhou, Chao Du, Wei Lu, Eero Lehtonen, Jussi H. Poikonen
FPAA/Memristor Hybrid Computing Infrastructure. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2015)
Tero Säntti, Jonne K. Poikonen, Olli Lahdenoja, Mika Laiho, Ari Paasio
Online seam tracking for laser welding with a vision chip and FPGA enabled camera system. ISCAS (2015)
Jussi H. Poikonen, Eero Lehtonen, Mika Laiho, Timo Knuutila
Implementation of nondeterministic finite automata in an autoassociative CAM circuit. ISCAS (2015)
Mika Laiho, Jussi H. Poikonen, Pentti Kanerva, Eero Lehtonen
High-dimensional computing with sparse vectors. BioCAS (2015)
Jussi H. Poikonen, Eero Lehtonen, Mika Laiho, Jonne K. Poikonen
Memristive Circuits for LDPC Decoding. IEEE J. Emerg. Sel. Topics Circuits Syst. 4 (4) (2014)
Eero Lehtonen, Jussi H. Poikonen, Mika Laiho, Pentti Kanerva
Large-Scale Memristive Associative Memories. IEEE Trans. Very Large Scale Integr. Syst. 22 (3) (2014)
Mika Laiho, Eero Lehtonen, Jennifer O. Hasler, Jiantao Zhou, Chao Du, Wei Lu, Jussi H. Poikonen
Analog signal processing on a FPAA/memristor hybrid circuit. ISCAS (2014)
Olli Lahdenoja, Tero Säntti, Mika Laiho, Ari Paasio, Jonne K. Poikonen
Seam tracking with adaptive image capture for fine-tuning of a high power laser welding process. ICMV (2014)
Eero Lehtonen, Jari Tissari, Jussi H. Poikonen, Mika Laiho, Lauri Koskinen
A cellular computing architecture for parallel memristive stateful logic. Microelectron. J. 45 (11) (2014)
Olli Lahdenoja, Tero Säntti, Jonne Poikonen, Mika Laiho, Ari Paasio
Characterizing Spatters in Laser Welding of Thick Steel Using Motion Flow Analysis. SCIA (2013)
Jacek Flak, Mika Laiho
Fault-tolerant programmable logic array for nanoelectronics. Int. J. Circuit Theory Appl. 40 (12) (2012)
Jussi H. Poikonen, Eero Lehtonen, Mika Laiho
On Synthesis of Boolean Expressions for Memristive Devices Using Sequential Implication Logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (7) (2012)
Eero Lehtonen, Jussi H. Poikonen, Mika Laiho
Implication logic synthesis methods for memristors. ISCAS (2012)
Mika Laiho, Eero Lehtonen, Wei Lu
Memristive analog arithmetic within cellular arrays. ISCAS (2012)
Eero Lehtonen, Jussi H. Poikonen, Mika Laiho, Wei Lu
Time-dependency of the threshold voltage in memristive devices. ISCAS (2011)
Lauri Koskinen, Jonne Poikonen, Mika Laiho, Ari Paasio
Rate-distortion performance analysis of an analog motion estimation array. ICASSP (2010)
Eero Lehtonen, Jussi H. Poikonen, Mika Laiho
A CNN approach to computing arbitrary Boolean functions. ISCAS (2010)
Mika Laiho, Eero Lehtonen
Cellular nanoscale network cell with memristors for local implication logic and synapses. ISCAS (2010)
Jonne Poikonen, Mika Laiho, Ari Paasio, Lauri Koskinen, Kari Halonen
An Analog Processor Array Implementing Interconnect-Efficient Reference Data Shift and SAD/SSD Extraction for Motion Estimation. EURASIP J. Adv. Signal Process. 2009 (2009)
Mika Laiho, Jonne Poikonen, Ari Paasio
Space-dependent binary image processing within a 64x64 mixed-mode array processor. ECCTD (2009)
Mika Laiho, Víctor M. Brea, Ari Paasio
Effect of Mismatch on the Reliability of ON/OFF-Programmable CNNs. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2009)
Eero Lehtonen, Mika Laiho
Stateful implication logic with memristors. NANOARCH (2009)
Olli Lahdenoja, Mika Laiho
Regional image correspondence matching method for SIMD processing. ECCTD (2009)
Mika Kämäräinen, Mikko Saukoski, Matti Paavola, Jere A. M. Järvinen, Mika Laiho, Kari Halonen
A Micropower Front End for Three-Axis Capacitive Microaccelerometers. IEEE Trans. Instrum. Meas. 58 (10) (2009)
Jonne Poikonen, Mika Laiho, Ari Paasio
MIPA4k: A 64×64 Cell Mixed-mode Image Processor Array. ISCAS (2009)
Mikko Pänkäälä, Mika Laiho, Paul E. Hasler
Compact floating-gate learning array with STDP. IJCNN (2009)
Olli Lahdenoja, Mika Laiho, Ari Paasio
On the Spatial Distribution of Local Non-parametric Facial Shape Descriptors. SCIA (2009)
Mika Laiho, Jonne Poikonen, Peter Virta, Ari Paasio
Live Demonstration: MIPA4k: A 64×64 Cell Mixed-mode Image Processor Array. ISCAS (2009)
Jonne Poikonen, Mika Laiho, Ari Paasio
Locally adaptive image sensing with the 64x64 cell MIPA4k mixed-mode image processor array. ECCTD (2009)
Markus Gronholm, Jonne Poikonen, Mika Laiho
A ring-oscillator-based active quenching and active recharge circuit for single photon avalanche diodes. ECCTD (2009)
Janne Maunu, Mika Laiho, Tero Koivisto, Kati Virtanen, Mikko Pänkäälä, Ari Paasio
Mixed-signal baseband processing chain for a MB-OFDM receiver. ICECS (2008)
Mika Laiho, Jonne Poikonen, Ari Paasio, Kari Halonen
Centroiding and classification of objects using a processor array with a scalable region of interest. ISCAS (2008)
Janne Maunu, Mika Laiho, Ari Paasio
A Differential Architecture for an Online Analog Viterbi Decoder. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2008)
Mika Laiho, Ari Paasio, Jacek Flak, Kari Halonen
Template Design for Cellular Nonlinear Networks With 1-Bit Weights. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2008)
Olli Lahdenoja, Mika Laiho, Janne Maunu, Ari Paasio
A Massively Parallel Face Recognition System. EURASIP J. Embed. Syst. 2007 (2007)
Matti Paavola, Mika Kämäräinen, Jere A. M. Järvinen, Mikko Saukoski, Mika Laiho, Kari Halonen
A 62μA Interface ASIC for a Capacitive 3-Axis Micro-Accelerometer. ISSCC (2007)
Matti Paavola, Mika Kämäräinen, Jere A. M. Järvinen, Mikko Saukoski, Mika Laiho, Kari A. I. Halonen
A Micropower Interface ASIC for a Capacitive 3-Axis Micro-Accelerometer. IEEE J. Solid State Circuits 42 (12) (2007)
Matti Paavola, Mikko Saukoski, Mika Laiho, Kari Halonen
A Micropower Voltage, Current, and Temperature Reference for a Low-Power Capacitive Sensor Interface. ISCAS (2007)
Matti Paavola, Mikko Saukoski, Mika Laiho, Kari Halonen
A nanopower double-mode 1-V frequency reference for an ultra-low-power capacitive sensor interface. ECCTD (2007)
Víctor M. Brea, Mika Laiho, Natalia A. Fernandez-Garcia, Ari Paasio, Diego Cabello
Relating Cellular Non-linear Networks to Threshold Logic and Single Instruction Multiple Data computing models. ECCTD (2007)
Olli Lahdenoja, Janne Maunu, Mika Laiho, Ari Paasio
A massively parallel algorithm for local binary pattern based face recognition. ISCAS (2006)
Janne Maunu, Mikko Pänkäälä, Joona Marku, Jonne Poikonen, Mika Laiho, Ari Paasio
Current source calibration by combination selection of minimum sized devices. ISCAS (2006)
Janne Maunu, Joona Marku, Mika Laiho, Ari Paasio
An On-Chip Measurement Circuit for Calibration by Combination Selection. SoCC (2006)
Olli Lahdenoja, Esa Alhoniemi, Mika Laiho, Ari Paasio
A Shape-Preserving Non-parametric Symmetry Transform. ICPR (2) (2006)
Jacek Flak, Mika Laiho, Ari Paasio, Kari Halonen
Dense CMOS implementation of a binary-programmable cellular neural network. Int. J. Circuit Theory Appl. 34 (4) (2006)
Matti Paavola, Mika Laiho, Mikko Saukoski, Kari Halonen
A 3µW, 2 MHz CMOS frequency reference for capacitive sensor applications. ISCAS (2006)
Víctor M. Brea, Mika Laiho, David López Vilariño, Ari Paasio, Diego Cabello
A binary-based on-chip CNN solution for pixel-level snakes. Int. J. Circuit Theory Appl. 34 (4) (2006)
Kati Virtanen, Mikko Pänkäälä, Mika Laiho, Ari Paasio
Implementation of an asynchronous current-mode ADC with adaptive quantization. ISCAS (2006)
Mika Laiho, Ari Paasio, Víctor M. Brea
Effect of mismatch on the reliability of binary-programmable CNNs. ISCAS (2006)
Matti Paavola, Mika Laiho, Mikko Saukoski, Kari Halonen
A micropower 2 MHz CMOS frequency reference for capacitive sensor applications. ECCTD (2005)
Mika Laiho, Ari Paasio, Jacek Flak, Kari Halonen
Template design for binary-programmable cellular nonlinear networks. ISCAS (4) (2005)
Olli Lahdenoja, Mika Laiho, Ari Paasio
Reducing the feature vector length in local binary pattern based face recognition. ICIP (2) (2005)
Víctor M. Brea, Mika Laiho, Ari Paasio
Robustness improvement in binary cellular non-linear network architectures. ECCTD (2005)
Mika Laiho, Ari Paasio
Dynamically coupled multi-layer mixed-mode CNN. ISCAS (6) (2005)
Víctor M. Brea, Mika Laiho, David López Vilariño, Ari Paasio, Diego Cabello
A one-quadrant discrete-time cellular neural network architecture for pixel-level snakes: B/W processing. ISCAS (4) (2005)
Víctor M. Brea, Mika Laiho, David López Vilariño, Ari Paasio, Diego Cabello
A one-quadrant discrete-time cellular neural network CMOS chip for pixel-level snakes. ISCAS (6) (2005)
Ari Paasio, Jacek Flak, Mika Laiho, Kari Halonen
High density VLSI implementation of a bipolar CNN with reduced programmability. ISCAS (3) (2004)
Asko Kananen, Mika Laiho, Kari Halonen, Ari Paasio
N × 16 cellular test chips for low-pass filtering large images. ISCAS (5) (2004)
Mika Laiho, Ari Paasio, Asko Kananen, Kari Halonen
A mixed-mode polynomial cellular array processor hardware realization. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2004)
Mika Laiho, Ari Paasio, Kari Halonen
Improved cell core for a mixed-mode polynomial CNN. ISCAS (3) (2004)
Mika Laiho, Ari Paasio, Asko Kananen, Kari Halonen
Realization of Couplings in a Polynomial Type Mixed-Mode Cellular Neural Network. Int. J. Neural Syst. 13 (6) (2003)
Ari Paasio, Mika Laiho, Asko Kananen, Kari Halonen, Jonne Poikonen
A 32×32 cellular test chip targeting new functionalities. ISCAS (3) (2003)
Mika Laiho, Ari Paasio, Asko Kananen, Kari Halonen
Cell and network level design of a mixed-mode CNN. ISCAS (1) (2002)
Mika Laiho, Ari Paasio, Asko Kananen, Kari Halonen
A mixed-mode polynomial-type CNN for analysing brain electrical activity in epilepsy. Int. J. Circuit Theory Appl. 30 (2-3) (2002)
Lauri Koskinen, Ari Paasio, Mika Laiho, Kari Halonen
Effect of CNN shape segmentation on MPEG-4 shape bit-rate. ISCAS (4) (2002)
Asko Kananen, Ari Paasio, Mika Laiho, Kari Halonen
CNN applications from the hardware point of view: video sequence segmentation. Int. J. Circuit Theory Appl. 30 (2-3) (2002)
Mika Laiho, Ari Paasio, Asko Kananen, Kari Halonen
Discrete time analog polynomial type CNN with digital state. ISCAS (3) (2001)
Mika Laiho, Ari Paasio, Kari Halonen
Building blocks for large annealed compact neural networks. ISCAS (2000)