Marcus van Ierssel

Publication Activity (10 Years)

Years Active: 1993-2023
Publications (10 Years): 7

Top Topics

Digital Signal Processor

Hough Transform

Top Venues

IEEE J. Solid State Circuits

Publications

Marcus van Ierssel, Fred N. Buhler, David Moore, Jeffrey Fredenburg
Synchronous Die-to-Die Signaling Using Aeonic Connect. CICC (2023)
Ravi Shivnaraine, Marcus van Ierssel, Kamran Farzan, Dominic DiClemente, George Ng, Nanyan Wang, Javid Musayev, Gairik Dutta, Masumi Shibata, Arash Moradi, Haleh Vahedi, Manavi Farzad, Prabhnoor Kainth, Matt Yu, Nhat Nguyen, Jennifer Pham, Angus McLaren
11.2 A 26.5625-to-106.25Gb/s XSR SerDes with 1.55pJ/b Efficiency in 7nm CMOS. ISSCC (2021)
Haidang Lin, Charlie Boecker, Masum Hossain, Shankar Tangirala, Roxanne Vu, Socrates D. Vamvakos, Eric Groen, Simon Li, Prashant Choudhary, Nanyan Wang, Masumi Shibata, Hossein Taghavi, Marcus van Ierssel, AdilHussain Maniyar, Adam Wodkowski, Kulwant Brar, Nhat Nguyen, Shaishav Desai
ADC-DSP-Based 10-to-112-Gb/s Multi-Standard Receiver in 7-nm FinFET. IEEE J. Solid State Circuits 56 (4) (2021)
Eric Groen, Charlie Boecker, Masum Hossain, Roxanne Vu, Socrates D. Vamvakos, Haidang Lin, Simon Li, Marcus van Ierssel, Prashant Choudhary, Nanyan Wang, Masumi Shibata, Mohammad Hossein Taghavi, Kulwant Brar, Nhat Nguyen, Shaishav Desai
10-to-112-Gb/s DSP-DAC-Based Transmitter in 7-nm FinFET With Flex Clocking Architecture. IEEE J. Solid State Circuits 56 (1) (2021)
Eric Groen, Charlie Boecker, Masum Hossain, Roxanne Vu, Socrates D. Vamvakos, Haidang Lin, Simon Li, Marcus van Ierssel, Prashant Choudhary, Nanyan Wang, Masumi Shibata, Mohammad Hossein Taghavi, Nhat Nguyen, Shaishav Desai
6.3 A 10-to-112Gb/s DSP-DAC-Based Transmitter with 1.2Vppd Output Swing in 7nm FinFET. ISSCC (2020)
Haidang Lin, Charles Boecker, Masum Hossain, Shankar Tangirala, Roxanne Vu, Socrates D. Vamvakos, Eric Groen, Simon Li, Prashant Choudhary, Nanyan Wang, Masumi Shibata, Hossein Taghavi, Marcus van Ierssel, AdilHussain Maniyar, Adam Wodkowski, Nhat Nguyen, Shaishav Desai
A 4×112 Gb/s ADC-DSP Based Multistandard Receiver in 7nm FinFET. VLSI Circuits (2020)
Mohammad Sadegh Jalali, Mohammad Hossein Taghavi, Angus McLaren, Jennifer Pham, Kamran Farzan, Dominic DiClemente, Marcus van Ierssel, William Song, Saman Asgaran, Chris D. Holdenried, Saman Sadr
A 4-Lane 1.25-to-28.05Gb/s multi-standard 6pJ/b 40dB transceiver in 14nm FinFET with independent TX/RX rate support. ISSCC (2018)
Chris D. Holdenried, Ryan Bespalko, Marcus van Ierssel, Mehrdad Ramezani, David Cassan, Siamak Sarvari, Saman Sadr
Performance of edge tap decision feedback equalization methods for wireline receivers. NEWCAS (2014)
Mehrdad Ramezani, Mohamed Abdalla, Ayal Shoval, Marcus van Ierssel, Afshin Rezayee, Angus McLaren, Chris D. Holdenried, Jennifer Pham, Eric So, David Cassan, Saman Sadr
An 8.4mW/Gb/s 4-lane 48Gb/s multi-standard-compliant transceiver in 40nm digital CMOS technology. ISSCC (2011)
Marcus van Ierssel, Hisakatsu Yamaguchi, Ali Sheikholeslami, Hirotaka Tamura, William W. Walker
Event-Driven Modeling of CDR Jitter Induced by Power-Supply Noise, Finite Decision-Circuit Bandwidth, and Channel ISI. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2008)
Marcus van Ierssel, Ali Sheikholeslami, Hirotaka Tamura, William W. Walker
A 3.2 Gb/s CDR Using Semi-Blind Oversampling to Achieve High Jitter Tolerance. IEEE J. Solid State Circuits 42 (10) (2007)
Ricky Yuen, Marcus van Ierssel, Ali Sheikholeslami, William W. Walker, Hirotaka Tamura
A 5Gb/s Transmitter with Reflection Cancellation for Backplane Transceivers. CICC (2006)
Marcus van Ierssel, Ali Sheikholeslami, Hirotaka Tamura, William W. Walker
A 3.2Gb/s Semi-Blind-Oversampling CDR. ISSCC (2006)
Marcus van Ierssel, Joyce Wong, Ali Sheikholeslami
An adaptive 4-PAM decision-feedback equalizer for chip-to-chip signaling. SoCC (2004)
Marcus van Ierssel, Tooraj Esmailian, Ali Sheikholeslami, P. S. Pasupathy
Signaling capacity of FR4 PCB traces for chip-to-chip communication. ISCAS (5) (2003)
David M. Lewis, David R. Galloway, Marcus van Ierssel, Jonathan Rose, Paul Chow
The Transmogrifier-2: a 1 million gate rapid-prototyping system. IEEE Trans. Very Large Scale Integr. Syst. 6 (2) (1998)
David M. Lewis, David R. Galloway, Marcus van Ierssel, Jonathan Rose, Paul Chow
The Transmogrifier-2: A 1 Million Gate Rapid Prototyping System. FPGA (1997)
David M. Lewis, Marcus van Ierssel, Daniel H. Wong
A Field Programmable Accelerator for Compiled-Code Applications. ICCD (1993)