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Ravi Shivnaraine
Publication Activity (10 Years)
Years Active: 2011-2021
Publications (10 Years): 1
Top Topics
Selection Algorithm
Phase Difference
High Speed
Clock Frequency
Top Venues
IEEE Trans. Circuits Syst. I Regul. Pap.
ISSCC
CICC
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Publications
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Ravi Shivnaraine
,
Marcus van Ierssel
,
Kamran Farzan
,
Dominic DiClemente
,
George Ng
,
Nanyan Wang
,
Javid Musayev
,
Gairik Dutta
,
Masumi Shibata
,
Arash Moradi
,
Haleh Vahedi
,
Manavi Farzad
,
Prabhnoor Kainth
,
Matt Yu
,
Nhat Nguyen
,
Jennifer Pham
,
Angus McLaren
11.2 A 26.5625-to-106.25Gb/s XSR SerDes with 1.55pJ/b Efficiency in 7nm CMOS.
ISSCC
(2021)
Ravi Shivnaraine
,
Mohammad Sadegh Jalali
,
Ali Sheikholeslami
,
Masaya Kibune
,
Hirotaka Tamura
An 8-11 Gb/s Reference-Less Bang-Bang CDR Enabled by "Phase Reset".
IEEE Trans. Circuits Syst. I Regul. Pap.
(7) (2014)
Mohammad Sadegh Jalali
,
Ravi Shivnaraine
,
Ali Sheikholeslami
,
Masaya Kibune
,
Hirotaka Tamura
An 8mW frequency detector for 10Gb/s half-rate CDR using clock phase selection.
CICC
(2013)
Behrooz Abiri
,
Ravi Shivnaraine
,
Ali Sheikholeslami
,
Hirotaka Tamura
,
Masaya Kibune
A 1-to-6Gb/s phase-interpolator-based burst-mode CDR in 65nm CMOS.
ISSCC
(2011)