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An 8mW frequency detector for 10Gb/s half-rate CDR using clock phase selection.
Mohammad Sadegh Jalali
Ravi Shivnaraine
Ali Sheikholeslami
Masaya Kibune
Hirotaka Tamura
Published in:
CICC (2013)
Keyphrases
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power consumption
high speed
phase difference
duty cycle
training phase
real time
image sequences
detection algorithm
detection method
selection algorithm
selection strategy
false alarm rate
clock frequency
frequency modulation