Luc Claesen

Publication Activity (10 Years)

Years Active: 1989-2023
Publications (10 Years): 27

Top Topics

Pose Estimation

Top Venues

Publications

Kai Huang, Bowen Li, Siang Chen, Luc Claesen, Wei Xi, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong, Xiaolang Yan
Structured Term Pruning for Computational Efficient Neural Networks Inference. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (1) (2023)
Kai Huang, Bowen Li, Dongliang Xiong, Haitian Jiang, Xiaowen Jiang, Xiaolang Yan, Luc Claesen, Dehong Liu, Junjian Chen, Zhili Liu
Structured Dynamic Precision for Deep Neural Networks Quantization. ACM Trans. Design Autom. Electr. Syst. 28 (1) (2023)
Guibiao Fang, Junhong Chen, Dayong Liang, Muhammad Asim, Frank Van Reeth, Luc Claesen, Zhenguo Yang, Wenyin Liu
Feature Correlation Transformer for Estimating Ambiguous Optical Flow. Neural Process. Lett. 55 (6) (2023)
Yuanlin Hong, Junhong Chen, Yu Cheng, Yishi Han, Frank Van Reeth, Luc Claesen, Wenyin Liu
ClueDepth Grasp: Leveraging positional clues of depth for completing depth of transparent objects. Frontiers Neurorobotics 16 (2022)
Kai Huang, Siang Chen, Bowen Li, Luc Claesen, Hao Yao, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong
Acceleration-Aware Fine-Grained Channel Pruning for Deep Neural Networks via Residual Gating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (6) (2022)
Kai Huang, Siang Chen, Bowen Li, Luc Claesen, Hao Yao, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong
Structured precision skipping: Accelerating convolutional neural networks with budget-aware dynamic precision selection. J. Syst. Archit. 124 (2022)
Bowen Li, Dongliang Xiong, Kai Huang, Xiaowen Jiang, Hao Yao, Junjian Chen, Luc Claesen
Sample-wise dynamic precision quantization for neural network acceleration. IEICE Electron. Express 19 (16) (2022)
Bowen Li, Kai Huang, Siang Chen, Dongliang Xiong, Luc Claesen
DPOQ: Dynamic Precision Onion Quantization. ACML (2021)
Siang Chen, Kai Huang, Bowen Li, Dongliang Xiong, Haitian Jiang, Luc Claesen
Adaptive Hybrid Composition Based Super-Resolution Network via Fine-Grained Channel Pruning. ECCV Workshops (3) (2020)
Aydin Emre Güzel, Dilara Hisar, Luc Claesen, H. Fatih Ugurdag
Fast Incremental Least Square Pose Estimation for Hardware Implementation with Rolling Shutter Camera. SIU (2020)
Bowen Li, Kai Huang, Siang Chen, Dongliang Xiong, Haitian Jiang, Luc Claesen
DFQF: Data Free Quantization-aware Fine-tuning. ACML (2020)
Qi Wang, Jinxing Lai, Luc Claesen, Zhenguo Yang, Liang Lei, Wenyin Liu
A novel feature representation: Aggregating convolution kernels for image retrieval. Neural Networks 130 (2020)
Siang Chen, Kai Huang, Dongliang Xiong, Bowen Li, Luc Claesen
Fine-Grained Channel Pruning for Deep Residual Neural Networks. ICANN (2) (2020)
Yanzhe Li, Luc Claesen, Kai Huang, Menglian Zhao
A Real-Time High-Quality Complete System for Depth Image-Based Rendering on FPGA. IEEE Trans. Circuits Syst. Video Technol. 29 (4) (2019)
Laurens Le Jeune, Wout Swinkels, Yi Sun, Constantinus Politis, Luc Claesen
Analysis of Collision Detection Using Implicit Sphere Tree in Saptic Interaction Environments for Maxillofacial Surgery Applications. CISP-BMEI (2018)
Michiel Darcis, Wout Swinkels, Aydin Emre Guzel, Luc Claesen
PoseLab: A Levenberg-Marquardt Based Prototyping Environment for Camera Pose Estimation. CISP-BMEI (2018)
Michiel Darcis, Gert Leurs, Kenny Geens, Alexandra Jankelevitch, Wout Swinkels, Luc Claesen
Automated winston-lutz test for efficient quality control in stereotactic radiosurgery. CISP-BMEI (2017)
Niels Pirotte, Casper Vranken, Wout Swinkels, Luc Claesen, Yi Sun, Constantinus Politis
Haptic collision detection on highly complex medical data structures. CISP-BMEI (2017)
Yanzhe Li, Kai Huang, Luc Claesen
High-quality view interpolation based on depth maps and its hardware implementation. FPL (2017)
Wout Swinkels, Luc Claesen, Feng Xiao, Haibin Shen
SVM point-based real-time emotion detection. DSC (2017)
Wout Swinkels, Luc Claesen, Feng Xiao, Haibin Shen
Real-time SVM-based emotion recognition algorithm. CISP-BMEI (2017)
Kobe Bamps, Celine Cuypers, Luc Claesen, Pieter Koopman
CT-based automatic identification and localization of the right phrenic nerve. CISP-BMEI (2017)
Yanzhe Li, Kai Huang, Luc Claesen
SoC and FPGA oriented high-quality stereo vision system. FPL (2016)
Yanzhe Li, Kai Huang, Luc Claesen
A Novel Hardware-Oriented Stereo Matching Algorithm and Its Architecture Design in FPGA. VLSI-SoC (Selected Papers) (2016)
Po-Yen Chen, Chien Chen, Parthiban Selvaraj, Luc Claesen
Poster: A Software-Defined Multi-Camera Network. MobiSys (Companion Volume) (2016)
Yanzhe Li, Kai Huang, Luc Claesen
SoC oriented real-time high-quality stereo vision system. VLSI-SoC (2016)
Yufeng Lu, Xiaohua Luo, Yimu Wang, Luc Claesen
Line buffer reduction for LUT-based real-time image inverse warping. NEWCAS (2016)
Yu Bao, Bart Stukken, Jef Stals, Caikou Chen, Luc Claesen
Quantitative comparison of lossless video compression for multi-camera stereo and view interpolation applications. NEWCAS (2015)
Bart Stukken, Yimu Wang, Yu Bao, Caikou Chen, Luc Claesen
Comparison of Predictive-Corrective Video Coding Filters for Real-Time FPGA-based Lossless Compression in Multi-Camera Systems. FPGAworld (2015)
Wout Swinkels, Yi Sun, Bart Stukken, Constantinus Politis, Luc Claesen
Cloud-based orthognathic surgical planning platform. NEWCAS (2015)
Zhengqiang Yu, Luc Claesen, Yun Pan, Andy Motten, Yimu Wang, Xiaolang Yan
SoC processor for real-time object labeling in life camera streams with low line level latency. ISCAS (2014)
Yimu Wang, Luc Claesen
A spatiotemporal dithering method to extend color depth in multi-display system. ICSAI (2014)
Yimu Wang, Alexander Peyls, Yun Pan, Luc Claesen, Xiaolang Yan
A Fast Self-Organizing Map Algorithm for Handwritten Digit Recognition. MUE (2013)
Andy Motten, Luc Claesen, Yun Pan
Trinocular disparity processor using a hierarchic classification structure. VLSI-SoC (2012)
Andy Motten, Luc Claesen, Yun Pan
Adaptive memory architecture for real-time image warping. ICCD (2012)
Andy Motten, Luc Claesen, Yun Pan
Trinocular Stereo Vision Using a Multi Level Hierarchical Classification Structure. VLSI-SoC (Selected Papers) (2012)
Andy Motten, Luc Claesen, Yun Pan
Binary confidence evaluation for a stereo vision based depth field processor SoC. ACPR (2011)
Andy Motten, Luc Claesen
A binary adaptable window SoC architecture for a stereo vision based depth field processor. VLSI-SoC (2010)
Luc Claesen, Peter Vandoren, Tom Van Laerhoven, Andy Motten, Domien Nowicki, Tom De Weyer, Frank Van Reeth, Eddy Flerackers
Smart camera SoC system for interactive real-time real-brush based digital painting systems. VLSI-SoC (2010)
Domien Nowicki, Luc Claesen
SoC architecture for real-time interactive painting based on lattice-Boltzmann. ICECS (2010)
Luc Claesen, Peter Vandoren, Tom Van Laerhoven, Andy Motten, Fabian Di Fiore, Frank Van Reeth, Jing Liao, Jinhui Yu
Smart Camera System-on-Chip Architecture for Real-Time Brush Based Interactive Painting Systems. VLSI-SoC (Selected Papers) (2010)
Andy Motten, Luc Claesen
An on-chip parallel memory architecture for a stereo vision system. ICECS (2010)
Peter Vandoren, Luc Claesen, Tom Van Laerhoven, Johannes Taelman, Chris Raymaekers, Eddy Flerackers, Frank Van Reeth
FluidPaint: an interactive digital painting system using real wet brushes. ITS (2009)
Peter Vandoren, Tom Van Laerhoven, Luc Claesen, Johannes Taelman, Fabian Di Fiore, Frank Van Reeth, Eddy Flerackers
Dip - it: digital infrared painting on an interactive table. CHI Extended Abstracts (2008)
Peter Vandoren, Tom Van Laerhoven, Luc Claesen, Johannes Taelman, Chris Raymaekers, Frank Van Reeth
IntuPaint: Bridging the gap between physical and digital painting. Tabletop (2008)
Luc Claesen, R. T. Boute, J. De Man, W. Ploegaerts, M. Seutter, J. Vanslembrouck, Diederik Verkest
Application of system semantics to VLSI for the transformational design of a parameterized booth multiplier module - a case study. Microprocessing and Microprogramming 27 (1-5) (1989)
W. Ploegaerts, Diederik Verkest, Luc Claesen, Hugo De Man
Description and verification of more-dimensional regular and non-homogeneous structures using a functional hardware description language. Microprocessing and Microprogramming 27 (1-5) (1989)