Kai Huang

Publication Activity (10 Years)

Years Active: 2007-2024
Publications (10 Years): 32

Top Topics

Inverse Halftoning

Top Venues

IEICE Electron. Express

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

ECCV Workshops (3)

Publications

Yizhao Zhou, Shuang Song, Yu Zheng, Tian Yang, Mengyu Li, Yipeng Cao, Feijun Zheng, Kai Huang, Zhichao Tan, Menglian Zhao
A 20.3μW 1.9GΩ Input Impedance Capacitively-Coupled Chopper-Stabilized Amplifier for Bio-Potential Readout. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (4) (2024)
Mengyu Li, Shuang Song, Dehong Wang, Tian Yang, Yu Zheng, Qiuyang Lin, Feijun Zheng, Kai Huang, Zhichao Tan, Menglian Zhao
A 30-μW 94.7-dB SNDR Noise-Shaping Current-Mode Direct-to-Digital Converter Using Triple-Slope Quantizer for PPG/NIRS Readout. IEEE J. Solid State Circuits 59 (6) (2024)
Shuang Song, Dehong Wang, Mengyu Li, Siyao Cao, Feijun Zheng, Kai Huang, Zhichao Tan, Sijun Du, Menglian Zhao
Low-Power On-Chip Energy Harvesting: From Interface Circuits Perspective. IEEE Open J. Circuits Syst. 5 (2024)
Baokui Zhu, Xiaowen Jiang, Kai Huang, Miao Yu
A Response-Feedback-Based Strong PUF with Improved Strict Avalanche Criterion and Reliability. Sensors 24 (1) (2024)
Jihu Liang, Ke Wang, Wei Xi, Changbao Xu, Junjian Chen, Kai Huang
SILL: Preventing structural attack for logic locking. IEICE Electron. Express 20 (2) (2023)
Kai Huang, Bowen Li, Siang Chen, Luc Claesen, Wei Xi, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong, Xiaolang Yan
Structured Term Pruning for Computational Efficient Neural Networks Inference. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (1) (2023)
Kai Huang, Bowen Li, Dongliang Xiong, Haitian Jiang, Xiaowen Jiang, Xiaolang Yan, Luc Claesen, Dehong Liu, Junjian Chen, Zhili Liu
Structured Dynamic Precision for Deep Neural Networks Quantization. ACM Trans. Design Autom. Electr. Syst. 28 (1) (2023)
Kai Huang, Siang Chen, Bowen Li, Luc Claesen, Hao Yao, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong
Acceleration-Aware Fine-Grained Channel Pruning for Deep Neural Networks via Residual Gating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (6) (2022)
Haitian Jiang, Dongliang Xiong, Xiaowen Jiang, Aiguo Yin, Li Ding, Kai Huang
Halftoning with Multi-Agent Deep Reinforcement Learning. CoRR (2022)
Haitian Jiang, Dongliang Xiong, Xiaowen Jiang, Aiguo Yin, Li Ding, Kai Huang
Halftoning with Multi-Agent Deep Reinforcement Learning. ICIP (2022)
Kai Huang, Siang Chen, Bowen Li, Luc Claesen, Hao Yao, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong
Structured precision skipping: Accelerating convolutional neural networks with budget-aware dynamic precision selection. J. Syst. Archit. 124 (2022)
Bowen Li, Dongliang Xiong, Kai Huang, Xiaowen Jiang, Hao Yao, Junjian Chen, Luc Claesen
Sample-wise dynamic precision quantization for neural network acceleration. IEICE Electron. Express 19 (16) (2022)
Bowen Li, Kai Huang, Siang Chen, Dongliang Xiong, Luc Claesen
DPOQ: Dynamic Precision Onion Quantization. ACML (2021)
Kai Huang, Ke Wang, Dan-dan Zheng, Xiaowen Jiang, Xiaomeng Zhang, Rongjie Yan, Xiaolang Yan
Expected Energy Optimization for Real-Time Multiprocessor SoCs Running Periodic Tasks with Uncertain Execution Time. IEEE Trans. Sustain. Comput. 6 (3) (2021)
Siang Chen, Kai Huang, Bowen Li, Dongliang Xiong, Haitian Jiang, Luc Claesen
Adaptive Hybrid Composition Based Super-Resolution Network via Fine-Grained Channel Pruning. ECCV Workshops (3) (2020)
Kai Huang, Yun He
Trigger Identification Using Difference-Amplified Controllability and Dynamic Transition Probability for Hardware Trojan Detection. IEEE Trans. Inf. Forensics Secur. 15 (2020)
Bowen Li, Kai Huang, Siang Chen, Dongliang Xiong, Haitian Jiang, Luc Claesen
DFQF: Data Free Quantization-aware Fine-tuning. ACML (2020)
Dongliang Xiong, Kai Huang, Haitian Jiang, Bowen Li, Siang Chen, Xiaowen Jiang
IdleSR: Efficient Super-Resolution Network with Multi-scale IdleBlocks. ECCV Workshops (3) (2020)
Siang Chen, Kai Huang, Dongliang Xiong, Bowen Li, Luc Claesen
Fine-Grained Channel Pruning for Deep Residual Neural Networks. ICANN (2) (2020)
Kai Huang, Xiaowen Jiang, Haitian Jiang, Xiaomeng Zhang, Min Yu, Rongjie Yan, Xiaolang Yan
Fine-Grained Communication-Aware Task Scheduling Approach for Acyclic and Cyclic Applications on MPSoCs. IEEE Access 7 (2019)
Dongliang Xiong, Kai Huang, Siang Chen, Bowen Li, Haitian Jiang, Wenyuan Xu
NoUCSR: Efficient Super-Resolution Network without Upsampling Convolution. ICCV Workshops (2019)
Kai Huang, Yun He, Xiaowen Jiang
Holistic hardware Trojan design of trigger and payload at gate level with rare switching signals eliminated. IEICE Electron. Express 16 (17) (2019)
Kai Huang, Xiaomeng Zhang, Dan-dan Zheng, Min Yu, Xiaowen Jiang, Xiaolang Yan, Lisane B. de Brisolara, Ahmed Amine Jerraya
A Scalable and Adaptable ILP-Based Approach for Task Mapping on MPSoC Considering Load Balance and Communication Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (9) (2019)
Jinxin Lin, Shunyu Liu, Gan Huang, Zhiguo Zhang, Kai Huang
The Recognition of Driving Action Based on EEG Signals Using Wavelet-CSP Algorithm. DSL (2018)
Kai Huang, Xiaowen Jiang, Xiaomeng Zhang, Rongjie Yan, Ke Wang, Dongliang Xiong, Xiaolang Yan
Energy-Efficient Fault-Tolerant Mapping and Scheduling on Heterogeneous Multiprocessor Real-Time Systems. IEEE Access 6 (2018)
Kai Huang, Ke Wang, Xiaoxu Zhang, Xiaolang Yan
Curve fitting based shared cache partitioning scheme for energy saving. IEICE Electron. Express 15 (22) (2018)
Xiaomeng Zhang, Kai Huang, Min Yu, Xiaowen Jiang, Xiaolang Yan
BFCO: A BPSO-Based Fine-Grained Communication Optimization Method for MPSoC. IEEE Access 6 (2018)
Dongliang Xiong, Kai Huang, Xiaowen Jiang, Xiaolang Yan
Providing Predictable Performance via a Slowdown Estimation Model. ACM Trans. Archit. Code Optim. 14 (3) (2017)
Peijin Cong, Liying Li, Gaoyuan Shao, Junlong Zhou, Mingsong Chen, Kai Huang, Tongquan Wei
User Perceived Value-Aware Cloud Pricing for Profit Maximization of Multiserver Systems. ICPADS (2017)
Rongjie Yan, Yupeng Zhou, Yige Yan, Minghao Yin, Min Yu, Feifei Ma, Kai Huang
A Hybrid Multi-objective Evolutionary Algorithm for Energy-Aware Allocation and Scheduling Optimization of MPSoCs. ICTAI (2017)
Gang Chen, Biao Hu, Kai Huang, Alois C. Knoll, Kai Huang, Di Liu, Todor P. Stefanov, Feng Li
Reconfigurable cache for real-time MPSoCs: Scheduling and implementation. Microprocess. Microsystems 42 (2016)
Dongliang Xiong, Kai Huang, Xiaowen Jiang, Xiaolang Yan
Memory Access Scheduling Based on Dynamic Multilevel Priority in Shared DRAM Systems. ACM Trans. Archit. Code Optim. 13 (4) (2016)
Kai Huang, Xiaoxu Zhang, Siwen Xiu, Dan-dan Zheng, Min Yu, De Ma, Kai Huang, Gang Chen, Xiaolang Yan
Profiling and annotation combined method for multimedia application specific MPSoC performance estimation. Frontiers Inf. Technol. Electron. Eng. 16 (2) (2015)
Kai Huang, Min Yu, Rongjie Yan, Xiaomeng Zhang, Xiaolang Yan, Lisane B. de Brisolara, Ahmed Amine Jerraya, Jiong Feng
Communication Optimizations for Multithreaded Code Generation from Simulink Models. ACM Trans. Embed. Comput. Syst. 14 (3) (2015)
Gang Chen, Biao Hu, Kai Huang, Alois C. Knoll, Kai Huang, Di Liu, Todor P. Stefanov
Automatic cache partitioning and time-triggered scheduling for real-time MPSoCs. ReConFig (2014)
Rongjie Yan, Min Yu, Kai Huang, Xiaomeng Zhang
Communication-oriented performance optimisation during code generation from Simulink models. Int. J. Embed. Syst. 6 (2/3) (2014)
Rongjie Yan, De Ma, Kai Huang, Xiaoxu Zhang, Siwen Xiu
Annotation and analysis combined cache modeling for native simulation. ASP-DAC (2014)
Kai Huang, Min Yu, Xiaomeng Zhang, Dan-dan Zheng, Siwen Xiu, Rongjie Yan, Kai Huang, Zhili Liu, Xiaolang Yan
ILP Based Multithreaded Code Generation for Simulink Model. IEICE Trans. Inf. Syst. (12) (2014)
Rongjie Yan, Kai Huang, Min Yu, Xiaomeng Zhang
Communication Pipelining for Code Generation from Simulink Models. TrustCom/ISPA/IUCC (2013)
Kai Huang, De Ma, Rongjie Yan, Haitong Ge, Xiaolang Yan
High throughput VLSI architecture for H.264/AVC context-based adaptive binary arithmetic coding (CABAC) decoding. J. Zhejiang Univ. Sci. C 14 (6) (2013)
De Ma, Rongjie Yan, Kai Huang, Min Yu, Siwen Xiu, Haitong Ge, Xiaolang Yan, Ahmed Amine Jerraya
Performance Estimation Techniques With MPSoC Transaction-Accurate Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (12) (2013)
Chunshu Li, Kai Huang, Xiaolang Yan, Jiong Feng, De Ma, Haitong Ge
A high efficient memory architecture for H.264/AVC motion compensation. ASAP (2010)
Sang-Il Han, Soo-Ik Chae, Lisane B. de Brisolara, Luigi Carro, Katalin Popovici, Xavier Guerin, Ahmed Amine Jerraya, Kai Huang, Lei Li, Xiaolang Yan
-based heterogeneous multiprocessor SoC design flow for mixed hardware/software refinement and simulation. Integr. 42 (2) (2009)
Kai Huang, Sang-Il Han, Katalin Popovici, Lisane B. de Brisolara, Xavier Guerin, Lei Li, Xiaolang Yan, Soo-Ik Chae, Luigi Carro, Ahmed Amine Jerraya
Simulink-Based MPSoC Design Flow: Case Study of Motion-JPEG and H.264. DAC (2007)