Kyle Rupnow

Publication Activity (10 Years)

Years Active: 2006-2020
Publications (10 Years): 27

Top Topics

Object Detection And Tracking

High Level Synthesis

Design Solutions

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Xiaofan Zhang, Haoming Lu, Cong Hao, Jiachen Li, Bowen Cheng, Yuhong Li, Kyle Rupnow, Jinjun Xiong, Thomas S. Huang, Honghui Shi, Wen-Mei Hwu, Deming Chen
SkyNet: a Hardware-Efficient Method for Object Detection and Tracking on Embedded Systems. MLSys (2020)
Cong Hao, Xiaofan Zhang, Yuhong Li, Sitao Huang, Jinjun Xiong, Kyle Rupnow, Wen-Mei Hwu, Deming Chen
FPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edge. CoRR (2019)
Keith A. Campbell, David Lin, Leon He, Liwei Yang, Swathi T. Gurumani, Kyle Rupnow, Subhasish Mitra, Deming Chen
Hybrid Quick Error Detection: Validation and Debug of SoCs Through High-Level Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (7) (2019)
Xiaofan Zhang, Haoming Lu, Cong Hao, Jiachen Li, Bowen Cheng, Yuhong Li, Kyle Rupnow, Jinjun Xiong, Thomas S. Huang, Honghui Shi, Wen-mei W. Hwu, Deming Chen
SkyNet: a Hardware-Efficient Method for Object Detection and Tracking on Embedded Systems. CoRR (2019)
Cong Hao, Xiaofan Zhang, Yuhong Li, Sitao Huang, Jinjun Xiong, Kyle Rupnow, Wen-Mei Hwu, Deming Chen
FPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edge. DAC (2019)
Xiaofan Zhang, Cong Hao, Haoming Lu, Jiachen Li, Yuhong Li, Yuchen Fan, Kyle Rupnow, Jinjun Xiong, Thomas S. Huang, Honghui Shi, Wen-Mei Hwu, Deming Chen
SkyNet: A Champion Model for DAC-SDC on Low Power Object Detection. CoRR (2019)
Xiaofan Zhang, Anand Ramachandran, Chuanhao Zhuge, Di He, Wei Zuo, Zuofu Cheng, Kyle Rupnow, Deming Chen
Machine learning on FPGAs to face the IoT revolution. ICCAD (2017)
Xiaofan Zhang, Anand Ramachandran, Chuanhao Zhuge, Di He, Wei Zuo, Zuofu Cheng, Kyle Rupnow, Deming Chen
Machine learning on FPGAs to face the IoT revolution. ICCAD (2017)
Xiaofan Zhang, Xinheng Liu, Anand Ramachandran, Chuanhao Zhuge, Shibin Tang, Peng Ouyang, Zuofu Cheng, Kyle Rupnow, Deming Chen
High-performance video content recognition with long-term recurrent convolutional network for FPGA. FPL (2017)
Sitao Huang, Gowthami Jayashri Manikandan, Anand Ramachandran, Kyle Rupnow, Wen-mei W. Hwu, Deming Chen
Hardware Acceleration of the Pair-HMM Algorithm for DNA Variant Calling. FPGA (2017)
Muhammad Teguh Satria, Swathi T. Gurumani, Wang Zheng, Keng Peng Tee, Augustine Koh, Pan Yu, Kyle Rupnow, Deming Chen
Real-time system-level implementation of a telepresence robot using an embedded GPU platform. DATE (2016)
Tan Nguyen, Swathi T. Gurumani, Kyle Rupnow, Deming Chen
FCUDA-SoC: Platform Integration for Field-Programmable SoC with the CUDA-to-FPGA Compiler. FPGA (2016)
Liwei Yang, Swathi T. Gurumani, Suhaib A. Fahmy, Deming Chen, Kyle Rupnow
Automated Verification Code Generation in HLS Using Software Execution Traces (Abstract Only). FPGA (2016)
Gowthami Jayashri Manikandan, Sitao Huang, Kyle Rupnow, Wen-mei W. Hwu, Deming Chen
Acceleration of the Pair-HMM Algorithm for DNA Variant Calling. FCCM (2016)
Keith A. Campbell, Leon He, Liwei Yang, Swathi T. Gurumani, Kyle Rupnow, Deming Chen
Debugging and verifying SoC designs through effective cross-layer hardware-software co-simulation. DAC (2016)
Yao Chen, Swathi T. Gurumani, Yun Liang, Guofeng Li, Donghui Guo, Kyle Rupnow, Deming Chen
FCUDA-NoC: A Scalable and Efficient Network-on-Chip Implementation for the CUDA-to-FPGA Flow. IEEE Trans. Very Large Scale Integr. Syst. 24 (6) (2016)
Tan Nguyen, Yao Chen, Kyle Rupnow, Swathi T. Gurumani, Deming Chen
SoC, NoC and Hierarchical Bus Implementations of Applications on FPGAs Using the FCUDA Flow. ISVLSI (2016)
Ying Chen, Tan Nguyen, Yao Chen, Swathi T. Gurumani, Yun Liang, Kyle Rupnow, Jason Cong, Wen-mei W. Hwu, Deming Chen
FCUDA-HB: Hierarchical and Scalable Bus Architecture Generation on FPGAs With the FCUDA Flow. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (12) (2016)
Zelei Sun, Keith A. Campbell, Wei Zuo, Kyle Rupnow, Swathi T. Gurumani, Frederic Doucet, Deming Chen
Designing high-quality hardware on a development effort budget: A study of the current state of high-level synthesis. ASP-DAC (2016)
Deming Chen, Jason Cong, Swathi T. Gurumani, Wen-mei W. Hwu, Kyle Rupnow, Zhiru Zhang
Platform choices and design demands for IoT platforms: cost, power, and performance tradeoffs. IET Cyper-Phys. Syst.: Theory & Appl. 1 (1) (2016)
Yun Liang, Muhammad Teguh Satria, Kyle Rupnow, Deming Chen
An Accurate GPU Performance Model for Effective Control Flow Divergence Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (7) (2016)
Liwei Yang, Swathi T. Gurumani, Deming Chen, Kyle Rupnow
AutoSLIDE: Automatic Source-Level Instrumentation and Debugging for HLS. FCCM (2016)
Xinheng Liu, Yao Chen, Tan Nguyen, Swathi T. Gurumani, Kyle Rupnow, Deming Chen
High Level Synthesis of Complex Applications: An H.264 Video Decoder. FPGA (2016)
Liwei Yang, Magzhan Ikram, Swathi T. Gurumani, Suhaib A. Fahmy, Deming Chen, Kyle Rupnow
JIT trace-based verification for high-level synthesis. FPT (2015)
Liwei Yang, Yao Chen, Wei Zuo, Tan Nguyen, Swathi T. Gurumani, Kyle Rupnow, Deming Chen
System-level design solutions: Enabling the IoT explosion. ASICON (2015)
Liwei Yang, Swathi T. Gurumani, Deming Chen, Kyle Rupnow
Behavioral-level IP integration in high-level synthesis. FPT (2015)
Yun Liang, Huynh Phung Huynh, Kyle Rupnow, Rick Siow Mong Goh, Deming Chen
Efficient GPU Spatial-Temporal Multitasking. IEEE Trans. Parallel Distributed Syst. 26 (3) (2015)
Swathi T. Gurumani, Jacob Tolar, Yao Chen, Yun Liang, Kyle Rupnow, Deming Chen
Integrated CUDA-to-FPGA Synthesis with Network-on-Chip. FCCM (2014)
Wei Zuo, Hongbin Zheng, Swathi T. Gurumani, Kyle Rupnow, Deming Chen
New solutions for system-level and high-level synthesis (Invited paper). ISIC (2014)
Hongbin Zheng, Swathi T. Gurumani, Liwei Yang, Deming Chen, Kyle Rupnow
High-Level Synthesis With Behavioral-Level Multicycle Path Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (12) (2014)
Hongbin Zheng, Swathi T. Gurumani, Kyle Rupnow, Deming Chen
Fast and effective placement and routing directed high-level synthesis for FPGAs. FPGA (2014)
Yun Liang, Zheng Cui, Kyle Rupnow, Deming Chen
Register and thread structure optimization for GPUs. ASP-DAC (2013)
Swathi T. Gurumani, Hisham Cholakkal, Yun Liang, Kyle Rupnow, Deming Chen
High-level synthesis of multiple dependent CUDA kernels on FPGA. ASP-DAC (2013)
Wei Zuo, Yun Liang, Peng Li, Kyle Rupnow, Deming Chen, Jason Cong
Improving high level synthesis optimization opportunity through polyhedral transformations. FPGA (2013)
Hongbin Zheng, Swathi T. Gurumani, Liwei Yang, Deming Chen, Kyle Rupnow
High-level synthesis with behavioral level multi-cycle path analysis. FPL (2013)
Zheng Cui, Yun Liang, Kyle Rupnow, Deming Chen
An Accurate GPU Performance Model for Effective Control Flow Divergence Optimization. IPDPS (2012)
Yun Liang, Kyle Rupnow, Yinan Li, Dongbo Min, Minh N. Do, Deming Chen
High-Level Synthesis: Productivity, Performance, and Software Constraints. J. Electr. Comput. Eng. 2012 (2012)
Yun Liang, Zheng Cui, Shengkui Zhao, Kyle Rupnow, Yihao Zhang, Douglas L. Jones, Deming Chen
Real-time implementation and performance optimization of 3D sound localization on GPUs. DATE (2012)
Kyle Rupnow, Yun Liang, Yinan Li, Dongbo Min, Minh N. Do, Deming Chen
High level synthesis of stereo matching: Productivity, performance, and software constraints. FPT (2011)
Kyle Rupnow, Yun Liang, Yinan Li, Deming Chen
A study of high-level synthesis: Promises and challenges. ASICON (2011)
Kyle Rupnow, Keith D. Underwood, Katherine Compton
Scientific Application Demands on a Reconfigurable Functional Unit Interface. ACM Trans. Reconfigurable Technol. Syst. 4 (2) (2011)
Kyle Rupnow, Jacob Adriaens, Wenyin Fu, Katherine Compton
Accurately evaluating application performance in simulated hybrid multi-tasking systems. FPGA (2010)
Hsiang-Kuo Tang, Kyle Rupnow, Parmesh Ramanathan, Katherine Compton
Dynamic Binding and Scheduling of Firm-Deadline Tasks on Heterogeneous Compute Resources. RTCSA (2010)
Philip Garcia, Kyle Rupnow, Katherine Compton
A Reconfigurable Computing Scheduler Optimized for Multicore Systems. FPL (2010)
Kyle Rupnow, Wenyin Fu, Katherine Compton
Block, Drop or Roll(back): Alternative Preemption Methods for RH Multi-Tasking. FCCM (2009)
Kyle Rupnow, Jacob Adriaens, Wenyin Fu, Katherine Compton
Performance metrics for hybrid multi-tasking systems. FPL (2009)
Kyle Rupnow, Keith D. Underwood, Katherine Compton
Scientific Application Acceleration with Reconfigurable Functional Units. FCCM (2007)
Jonathan Evans, Kyle Rupnow, Katherine Compton
Reconfigurable Functional Units for Scientific Superscalar Processors. FPT (2007)
Kyle Rupnow, Arun Rodrigues, Keith D. Underwood, Katherine Compton
Scientific applications vs. SPEC-FP: a comparison of program behavior. ICS (2006)