Integrated CUDA-to-FPGA Synthesis with Network-on-Chip.

Swathi T. Gurumani Jacob Tolar Yao Chen Yun Liang Kyle Rupnow Deming Chen

Published in: FCCM (2014)

Keyphrases

network on chip
routing algorithm
general purpose
multi processor
parallel implementation
network simulator
real time
low cost
high speed
parallel computing
field programmable gate array
single chip
image processing
computer systems
shortest path
data acquisition