Krzysztof S. Berezowski

Publication Activity (10 Years)

Years Active: 2001-2014
Publications (10 Years): 0

Top Topics

Mathematical Models

Database Systems

Top Venues

Microelectron. J.

ACM Great Lakes Symposium on VLSI

Publications

Pawel Weber, Maciej Zagrabski, Bartosz Wojciechowski, Maciej Nikodem, Krzysztof Kepa, Krzysztof S. Berezowski
Calibration of RO-based temperature sensors for a toolset for measuring thermal behavior of FPGA devices. Microelectron. J. 45 (12) (2014)
Przemyslaw Sliwinski, Krzysztof S. Berezowski, Pawel Wachel, Gilles Sicard, Laurent Fesquet
Empirical Recovery of Input Nonlinearity in Distributed Element Models. ALCOSP (2013)
Bartosz Wojciechowski, Krzysztof S. Berezowski, Piotr Patronik, Janusz Biernat
Fast and accurate thermal modeling and simulation of manycore processors and workloads. Microelectron. J. 44 (11) (2013)
Piotr Patronik, Krzysztof S. Berezowski, Janusz Biernat, Stanislaw J. Piestrak, Aviral Shrivastava
Design of an RNS reverse converter for a new five-moduli special set. ACM Great Lakes Symposium on VLSI (2012)
Tejaswi Gowda, Sarma B. K. Vrudhula, Niranjan Kulkarni, Krzysztof S. Berezowski
Identification of Threshold Functions and Synthesis of Threshold Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (5) (2011)
Piotr Patronik, Krzysztof S. Berezowski, Stanislaw J. Piestrak, Janusz Biernat, Aviral Shrivastava
Fast and energy-efficient constant-coefficient FIR filters using residue number system. ISLPED (2011)
Samuel Leshner, Krzysztof S. Berezowski, Xiaoyin Yao, Gayathri Chalivendra, Saurabh Patel, Sarma B. K. Vrudhula
A Low Power, High Performance Threshold Logic-Based Standard Cell Multiplier in 65 nm CMOS. ISVLSI (2010)
Siddhesh S. Mhambrey, Lawrence T. Clark, Satendra Kumar Maurya, Krzysztof S. Berezowski
Out-of-order issue logic using sorting networks. ACM Great Lakes Symposium on VLSI (2010)
Rooju Chokshi, Krzysztof S. Berezowski, Aviral Shrivastava, Stanislaw J. Piestrak
Exploiting residue number system for power-efficient digital signal processing in embedded processors. CASES (2009)
Ravishankar Rao, Sarma B. K. Vrudhula, Krzysztof S. Berezowski
Analytical results for design space exploration of multi-core processors employing thread migration. ISLPED (2008)
Krzysztof S. Berezowski, Sarma B. K. Vrudhula
Multiple-Valued Logic Circuits Design Using Negative Differential Resistance Devices. J. Multiple Valued Log. Soft Comput. 13 (4-6) (2007)
Krzysztof S. Berezowski, Sarma B. K. Vrudhula
Multiple-Valued Logic Circuits Design Using Negative Differential Resistance Devices. ISMVL (2007)
Krzysztof S. Berezowski, Sarma B. K. Vrudhula
Automatic Design of Binary and Multiple-Valued Logic Gates on RTD Series. DSD (2005)
Krzysztof S. Berezowski
Transistor Chainning with Integrated Dynamic Folding for 1-D Leaf Cell Synthesis. DSD (2001)