Janusz Biernat

Publication Activity (10 Years)

Years Active: 2005-2013
Publications (10 Years): 0

Top Topics

Design Methodology

Texture Synthesis

Parallel Algorithm

Top Venues

Microelectron. J.

ACM Great Lakes Symposium on VLSI

Publications

Bartosz Wojciechowski, Krzysztof S. Berezowski, Piotr Patronik, Janusz Biernat
Fast and accurate thermal modeling and simulation of manycore processors and workloads. Microelectron. J. 44 (11) (2013)
Maciej Nikodem, Marek A. Bawiec, Janusz Biernat
Synthesis of Multithreshold Threshold Gates. ISVLSI (2012)
Piotr Patronik, Krzysztof S. Berezowski, Janusz Biernat, Stanislaw J. Piestrak, Aviral Shrivastava
Design of an RNS reverse converter for a new five-moduli special set. ACM Great Lakes Symposium on VLSI (2012)
Maciej Nikodem, Marek A. Bawiec, Janusz Biernat
Synthesis of Generalised Threshold Gates and Multi Threshold Threshold Gates. ICSEng (2011)
Piotr Patronik, Krzysztof S. Berezowski, Stanislaw J. Piestrak, Janusz Biernat, Aviral Shrivastava
Fast and energy-efficient constant-coefficient FIR filters using residue number system. ISLPED (2011)
Marek A. Bawiec, Bartosz Wojciechowski, Maciej Nikodem, Janusz Biernat
Synthesis of Logic Circuits Based on Negative Differential Resistance Property. EUROCAST (1) (2011)
Janusz Biernat
Fast fault-tolerant adders. Int. J. Crit. Comput. Based Syst. 1 (1/2/3) (2010)
Janusz Biernat
The Complexity of Fault-Tolerant Adder Structures. DepCoS-RELCOMEX (2008)
Janusz Biernat
Self-Dual Modules in Design of Dependable Digital Devices. DepCoS-RELCOMEX (2006)
Janusz Biernat, Maciej Nikodem
Fault Cryptanalysis of ElGamal Signature Scheme. EUROCAST (2005)