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Kiyoo Itoh
Publication Activity (10 Years)
Years Active: 1994-2002
Publications (10 Years): 0
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Publications
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Tomonori Sekiguchi
,
Kiyoo Itoh
,
Tsugio Takahashi
,
Masahiro Sugaya
,
Hiroki Fujisawa
,
Masayuki Nakamura
,
Kazuhiko Kajigaya
,
Katsutaka Kimura
A low-impedance open-bitline array for multigigabit DRAM.
IEEE J. Solid State Circuits
37 (4) (2002)
Tsugio Takahashi
,
Tomonori Sekiguchi
,
Riichiro Takemura
,
Seiji Narui
,
Hiroki Fujisawa
,
Shinichi Miyatake
,
Makoto Morino
,
Koji Arai
,
Satoru Yamada
,
Shoji Shukuri
,
Masayuki Nakamura
,
Yoshitaka Tadaki
,
Kazuhiko Kajigaya
,
Katsutaka Kimura
,
Kiyoo Itoh
open-bitline cell, distributed overdriven sensing, and stacked-flash fuse.
IEEE J. Solid State Circuits
36 (11) (2001)
Kiyoo Itoh
,
Yoshinobu Nakagome
,
Shin'ichiro Kimura
,
Takao Watanabe
Limitations and challenges of multigigabit DRAM chip design.
IEEE J. Solid State Circuits
32 (5) (1997)
Kiyoo Itoh
,
Katsuro Sasaki
,
Yoshinobu Nakagome
Trends in low-power RAM circuit technologies.
Proc. IEEE
83 (4) (1995)
Takeshi Sakata
,
Kiyoo Itoh
,
Masashi Horiguchi
,
Masakazu Aoki
Two-dimensional power-line selection scheme for low subthreshold-current multi-gigabit DRAM's.
IEEE J. Solid State Circuits
29 (8) (1994)
Takeshi Sakata
,
Kiyoo Itoh
,
Masashi Horiguchi
,
Masakazu Aoki
Subthreshold-current reduction circuits for multi-gigabit DRAM's.
IEEE J. Solid State Circuits
29 (7) (1994)