A low-impedance open-bitline array for multigigabit DRAM.

Tomonori Sekiguchi Kiyoo Itoh Tsugio Takahashi Masahiro Sugaya Hiroki Fujisawa Masayuki Nakamura Kazuhiko Kajigaya Katsutaka Kimura

Published in: IEEE J. Solid State Circuits (2002)

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