Karthikeyan Reddy

Publication Activity (10 Years)

Years Active: 2006-2018
Publications (10 Years): 2

Top Topics

Quantization Noise

Top Venues

IEEE J. Solid State Circuits

Publications

Siladitya Dey, Karthikeyan Reddy, Kartikeya Mayaram, Terri S. Fiez
A 50 MHz BW 76.1 dB DR Two-Stage Continuous-Time Delta-Sigma Modulator With VCO Quantizer Nonlinearity Cancellation. IEEE J. Solid State Circuits 53 (3) (2018)
Siladitya Dey, Karthikeyan Reddy, Kartikeya Mayaram, Terri S. Fiez
A 50 MHz BW 73.5 dB SNDR two-stage continuous-time ΔΣ modulator with VCO quantizer nonlinearity cancellation. CICC (2017)
Karthikeyan Reddy, Siladitya Dey, Sachin Rao, Brian Young, Praveen Prabha, Pavan Kumar Hanumolu
A 54mW 1.2GS/s 71.5dB SNDR 50MHz BW VCO-based CT ΔΣ ADC using dual phase/frequency feedback in 65nm CMOS. VLSIC (2015)
Praveen Prabha, Seong Joong Kim, Karthikeyan Reddy, Sachin Rao, Nathanael Griesert, Arun Rao, Greg Winter, Pavan Kumar Hanumolu
A Highly Digital VCO-Based ADC Architecture for Current Sensing Applications. IEEE J. Solid State Circuits 50 (8) (2015)
Mrunmay Talegaonkar, Amr Elshazly, Karthikeyan Reddy, Praveen Prabha, Tejasvi Anand, Pavan Kumar Hanumolu
An 8 Gb/s-64 Mb/s, 2.3-4.2 mW/Gb/s Burst-Mode Transmitter in 90 nm CMOS. IEEE J. Solid State Circuits 49 (10) (2014)
Sachin Rao, Karthikeyan Reddy, Brian Young, Pavan Kumar Hanumolu
A Deterministic Digital Background Calibration Technique for VCO-Based ADCs. IEEE J. Solid State Circuits 49 (4) (2014)
Praveen Prabha, Seong Joong Kim, Karthikeyan Reddy, Sachin Rao, Nathanael Griesert, Arun Rao, Greg Winter, Pavan Kumar Hanumolu
A VCO-based current-to-digital converter for sensor applications. CICC (2014)
Karthikeyan Reddy, Sachin Rao, Rajesh Inti, Brian Young, Amr Elshazly, Mrunmay Talegaonkar, Pavan Kumar Hanumolu
A 16mW 78dB-SNDR 10MHz-BW CT-ΔΣ ADC using residue-cancelling VCO-based quantizer. ISSCC (2012)
Karthikeyan Reddy, Sachin Rao, Rajesh Inti, Brian Young, Amr Elshazly, Mrunmay Talegaonkar, Pavan Kumar Hanumolu
A 16-mW 78-dB SNDR 10-MHz BW CT Delta Sigma ADC Using Residue-Cancelling VCO-Based Quantizer. IEEE J. Solid State Circuits 47 (12) (2012)
Karthikeyan Reddy, Shanthi Pavan
A 20.7mW continuous-time ΔΣ modulator with 15MHz bandwidth and 70 dB dynamic range. ESSCIRC (2008)
Karthikeyan Reddy, Shanthi Pavan
Fundamental Limitations of Continuous-Time Delta-Sigma Modulators Due to Clock Jitter. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2007)
Karthikeyan Reddy, Shanthi Pavan
Fundamental limitations of continuous-time delta-sigma modulators due to clock jitter. ISCAS (2006)