Jude A. Rivers

Publication Activity (10 Years)

Years Active: 1996-2017
Publications (10 Years): 1

Top Topics

Buffer Overflow

Power Management

Top Venues

ACM Trans. Embed. Comput. Syst.

ACM J. Emerg. Technol. Comput. Syst.

Publications

Qining Lu, Guanpeng Li, Karthik Pattabiraman, Meeta Sharma Gupta, Jude A. Rivers
Configurable Detection of SDC-causing Errors in Programs. ACM Trans. Embed. Comput. Syst. 16 (3) (2017)
Qining Lu, Karthik Pattabiraman, Meeta Sharma Gupta, Jude A. Rivers
SDCTune: A model for predicting the SDC proneness of an application for configurable protection. CASES (2014)
Guangyu Sun, Eren Kursun, Jude A. Rivers, Yuan Xie
Exploring the vulnerability of CMPs to soft errors with 3D stacked nonvolatile memory. ACM J. Emerg. Technol. Comput. Syst. 9 (3) (2013)
Pradip Bose, Alper Buyuktosunoglu, John A. Darringer, Meeta Sharma Gupta, Michael B. Healy, Hans M. Jacobson, Indira Nair, Jude A. Rivers, Jeonghee Shin, Augusto Vega, Alan J. Weger
Power management of multi-core chips: Challenges and pitfalls. DATE (2012)
Guangyu Sun, Eren Kursun, Jude A. Rivers, Yuan Xie
Exploring the vulnerability of CMPs to soft errors with 3D stacked non-volatile memory. ICCD (2011)
Jude A. Rivers, Meeta Sharma Gupta, Jeonghee Shin, Prabhakar Kudva, Pradip Bose
Error Tolerance in Server Class Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (7) (2011)
Nak Hee Seong, Dong Hyuk Woo, Vijayalakshmi Srinivasan, Jude A. Rivers, Hsien-Hsin S. Lee
SAFER: Stuck-At-Fault Error Recovery for Memories. MICRO (2010)
Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, John A. Darringer, Meeta Sharma Gupta, Hendrik F. Hamann, Hans M. Jacobson, Prabhakar Kudva, Eren Kursun, Niti Madan, Indira Nair, Jude A. Rivers, Jeonghee Shin, Alan J. Weger, Victor V. Zyuban
Power-efficient, reliable microprocessor architectures: modeling and design methods. ACM Great Lakes Symposium on VLSI (2010)
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Jude A. Rivers
Scalable high performance main memory system using phase-change memory technology. ISCA (2009)
Jude A. Rivers, Prabhakar Kudva
Reliability Challenges and System Performance at the Architecture Level. IEEE Des. Test Comput. 26 (6) (2009)
Meeta Sharma Gupta, Jude A. Rivers, Pradip Bose, Gu-Yeon Wei, David M. Brooks
Tribeca: design for PVT variations with local recovery and fine-grained adaptation. MICRO (2009)
Pradeep Ramachandran, Sarita V. Adve, Pradip Bose, Jude A. Rivers
Metrics for Architecture-Level Lifetime Reliability Analysis. ISPASS (2008)
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. Rivers
Online Estimation of Architectural Vulnerability Factor for Soft Errors. ISCA (2008)
Jude A. Rivers, Pradip Bose, Prabhakar Kudva, John-David Wellman, Pia N. Sanda, Ethan H. Cannon, Luiz C. Alves
Phaser: Phased methodology for modeling the system-level effects of soft errors. IBM J. Res. Dev. 52 (3) (2008)
Jeonghee Shin, Victor V. Zyuban, Zhigang Hu, Jude A. Rivers, Pradip Bose
A Framework for Architecture-Level Lifetime Reliability Modeling. DSN (2007)
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. Rivers
Architecture-Level Soft Error Analysis: Examining the Limits of Common Assumptions. DSN (2007)
Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers
Lifetime Reliability: Toward an Architectural Solution. IEEE Micro 25 (3) (2005)
Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers
Exploiting Structural Duplication for Lifetime Reliability Enhancement. ISCA (2005)
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. Rivers
SoftArch: An Architecture Level Tool for Modeling and Analyzing Soft Errors. DSN (2005)
Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers
The Case for Lifetime Reliability-Aware Microprocessors. ISCA (2004)
Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers
The Impact of Technology Scaling on Lifetime Reliability. DSN (2004)
Jude A. Rivers, Sameh W. Asaad, John-David Wellman, Jaime H. Moreno
Reducing instruction fetch energy with backwards branch control information and buffering. ISLPED (2003)
Edward S. Tam, Jude A. Rivers, Vijayalakshmi Srinivasan, Gary S. Tyson, Edward S. Davidson
Active Management of Data Caches by Exploiting Reuse Information. IEEE Trans. Computers 48 (11) (1999)
Edward S. Tam, Jude A. Rivers, Gary S. Tyson, Edward S. Davidson
mlcache: A Flexible Multi-Lateral Cache Simulator. MASCOTS (1998)
Edward S. Tam, Jude A. Rivers, Vijayalakshmi Srinivasan, Gary S. Tyson, Edward S. Davidson
Evaluating the performance of active cache management schemes. ICCD (1998)
Jude A. Rivers, Edward S. Tam, Gary S. Tyson, Edward S. Davidson, Matthew K. Farrens
Utilizing Reuse Information in Data Cache Management. International Conference on Supercomputing (1998)
Jude A. Rivers, Edward S. Tam, Edward S. Davidson
On Effective Data Supply For Multi-Issue Processors. ICCD (1997)
Jude A. Rivers, Gary S. Tyson, Edward S. Davidson, Todd M. Austin
On High-Bandwidth Data Cache Design for Multi-Issue Processors. MICRO (1997)
Jude A. Rivers, Edward S. Davidson
Reducing Conflicts in Direct-Mapped Caches with a Temporality-Based Design. ICPP, Vol. 1 (1996)
Jude A. Rivers, Edward S. Davidson
Performance Issues in Integrating Temporality-Based Caching with Prefetching. Perform. Evaluation (4) (1996)