Matthew K. Farrens

Publication Activity (10 Years)

Years Active: 1989-2021
Publications (10 Years): 12

Top Topics

High Throughput

Predictive Control

Top Venues

Future Gener. Comput. Syst.

Publications

Sambit Kumar Shukla, Dipak Ghosal, Matthew K. Farrens
Understanding and Leveraging Cluster Heterogeneity for Efficient Execution of Cloud Services. CloudNet (2021)
Sambit Kumar Shukla, Matthew K. Farrens
Leveraging Network Delay Variability to Improve QoE of Latency Critical Services. NAS (2021)
Goldwayne Smith Leh, Jian Wu, Sambit Shukla, Matthew K. Farrens, Dipak Ghosal
Model-Driven Joint Optimization of Power and Latency Guarantee in Data center Applications. SN Comput. Sci. 1 (1) (2020)
Kramer Straube, Jason Lowe-Power, Christopher Nitta, Matthew K. Farrens, Venkatesh Akella
HCAPP: Scalable Power Control for Heterogeneous 2.5D Integrated Systems. ICPP (2020)
Sambit Kumar Shukla, Dipak Ghosal, Matthew K. Farrens
Tuning Network I/O Processing to Achieve Performance and Energy Objectives of Latency Critical Workloads. HPCC/SmartCity/DSS (2019)
Sambit Shukla, Dipak Ghosal, Kesheng Wu, Alex Sim, Matthew K. Farrens
Co-optimizing Latency and Energy for IoT services using HMP servers in Fog Clusters. FMEC (2019)
Jason Lowe-Power, Venkatesh Akella, Matthew K. Farrens, Samuel T. King, Christopher J. Nitta
A case for exposing extra-architectural state in the ISA: position paper. HASP@ISCA (2018)
Kramer Straube, Jason Lowe-Power, Christopher Nitta, Matthew K. Farrens, Venkatesh Akella
Improving Provisioned Power Efficiency in HPC Systems with GPU-CAPP. HiPC (2018)
Nathan Hanford, Vishal Ahuja, Matthew K. Farrens, Brian Tierney, Dipak Ghosal
A Survey of End-System Optimizations for High-Speed Networks. ACM Comput. Surv. 51 (3) (2018)
Kramer Straube, Christopher Nitta, Raj Amirtharajah, Matthew K. Farrens, Venkatesh Akella
Improving Execution Time of Parallel Programs on Large Scale Chip Multiprocessors with Constant Average Power Processing. ICCD (2017)
David Fridovich-Keil, Nathan Hanford, Margaret P. Chapman, Claire J. Tomlin, Matthew K. Farrens, Dipak Ghosal
A model predictive control approach to flow pacing for TCP. Allerton (2017)
Nathan Hanford, Vishal Ahuja, Matthew K. Farrens, Dipak Ghosal, Mehmet Balman, Eric Pouyoul, Brian Tierney
Improving network performance on multicore systems: Impact of core affinities on high throughput flows. Future Gener. Comput. Syst. 56 (2016)
Ross K. Gegan, Rennie Archibald, Matthew K. Farrens, Dipak Ghosal
Performance Analysis of Real-Time Covert Timing Channel Detection Using a Parallel System. NSS (2015)
Nathan Hanford, Vishal Ahuja, Matthew K. Farrens, Dipak Ghosal, Mehmet Balman, Eric Pouyoul, Brian Tierney
Analysis of the effect of core affinity on high-throughput flows. NDM@SC (2014)
Kevin Macdonald, Christopher Nitta, Matthew K. Farrens, Venkatesh Akella
PDG_GEN: A Methodology for Fast and Accurate Simulation of On-Chip Networks. IEEE Trans. Computers 63 (3) (2014)
Nathan Hanford, Vishal Ahuja, Matthew K. Farrens, Dipak Ghosal, Mehmet Balman, Eric Pouyoul, Brian Tierney
Impact of the end-system and affinities on the throughput of high-speed flows. ANCS (2014)
Paul Congdon, Prasant Mohapatra, Matthew K. Farrens, Venkatesh Akella
Simultaneously Reducing Latency and Power Consumption in OpenFlow Switches. IEEE/ACM Trans. Netw. 22 (3) (2014)
Nathan Hanford, Vishal Ahuja, Mehmet Balman, Matthew K. Farrens, Dipak Ghosal, Eric Pouyoul, Brian Tierney
Characterizing the impact of end-system affinities on the end-to-end performance of high-speed flows. NDM@SC (2013)
Christopher Nitta, Matthew K. Farrens, Venkatesh Akella
DCAF - A Directly Connected Arbitration-Free Photonic Crossbar for Energy-Efficient High Performance Computing. IPDPS (2012)
Vishal Ahuja, Dipak Ghosal, Matthew K. Farrens
Minimizing the Data Transfer Time Using Multicore End-System Aware Flow Bifurcation. CCGRID (2012)
Christopher Nitta, Matthew K. Farrens, Venkatesh Akella
DCOF - An Arbitration Free Directly Connected Optical Fabric. IEEE J. Emerg. Sel. Topics Circuits Syst. 2 (2) (2012)
Vishal Ahuja, Matthew K. Farrens, Dipak Ghosal
Cache-aware affinitization on commodity multicores for high-speed network flows. ANCS (2012)
Christopher Nitta, Matthew K. Farrens, Venkatesh Akella
Addressing system-level trimming issues in on-chip nanophotonic networks. HPCA (2011)
Christopher Nitta, Matthew K. Farrens, Venkatesh Akella
Resilient microring resonator based photonic networks. MICRO (2011)
Vishal Ahuja, Amitabha Banerjee, Matthew K. Farrens, Dipak Ghosal, Giuseppe Serazzi
Introspective end-system modeling to optimize the transfer time of rate based protocols. HPDC (2011)
Christopher Nitta, Kevin Macdonald, Matthew K. Farrens, Venkatesh Akella
Inferring packet dependencies to improve trace based simulation of on-chip networks. NOCS (2011)
Paul Vincent Mejia, Rajeevan Amirtharajah, Matthew K. Farrens, Venkatesh Akella
Performance Evaluation of a Multicore System with Optically Connected Memory Modules. NOCS (2010)
Paul Congdon, Matthew K. Farrens, Prasant Mohapatra
Packet prediction for speculative cut-through switching. ANCS (2008)
Amit Hadke, Tony Benavides, Rajeevan Amirtharajah, Matthew K. Farrens, Venkatesh Akella
Design and evaluation of an optical CPU-DRAM interconnect. ICCD (2008)
Christopher Nitta, Matthew K. Farrens
Techniques for increasing effective data bandwidth. ICCD (2008)
Mark Oskin, Frederic T. Chong, Matthew K. Farrens
Using Statistical and Symbolic Simulation for Microprocessor Performance Evaluation. J. Instr. Level Parallelism 4 (2002)
Hsien-Hsin S. Lee, Gary S. Tyson, Matthew K. Farrens
Improving Bandwidth Utilization using Eager Writeback. J. Instr. Level Parallelism 3 (2001)
Kevin D. Rich, Matthew K. Farrens
Code Partitioning in Decoupled Compilers. Euro-Par (2000)
Hsien-Hsin S. Lee, Gary S. Tyson, Matthew K. Farrens
Eager writeback - a technique for improving bandwidth utilization. MICRO (2000)
Michael Haungs, Phil Sallee, Matthew K. Farrens
Branch Transition Rate: A New Metric for Improved Branch Classification Analysis. HPCA (2000)
Mark Oskin, Frederic T. Chong, Matthew K. Farrens
HLS: combining statistical and symbolic simulation to guide microprocessor designs. ISCA (2000)
Kevin D. Rich, Matthew K. Farrens
The Decoupled-Style Prefetch Architecture (Research Note). Euro-Par (2000)
Mark Oskin, Justin Hensley, Diana Keen, Frederic T. Chong, Matthew K. Farrens, Aneet Chopra
Exploiting ILP in Page-based Intelligent Memory. MICRO (1999)
Matthew K. Farrens
The architecture curriculum at UC-Davis. WCAE@ISCA (1998)
Jude A. Rivers, Edward S. Tam, Gary S. Tyson, Edward S. Davidson, Matthew K. Farrens
Utilizing Reuse Information in Data Cache Management. International Conference on Supercomputing (1998)
Gary S. Tyson, Matthew K. Farrens, John Matthews, Andrew R. Pleszkun
Managing data caches using selective cache line replacement. Int. J. Parallel Program. 25 (3) (1997)
Gary S. Tyson, Matthew K. Farrens
Evaluating the Effects of Predicated Execution on Branch Prediction. Int. J. Parallel Program. 24 (2) (1996)
Matthew K. Farrens
Distributed Decentralized Computing. ACM Comput. Surv. 28 (4es) (1996)
Matthew K. Farrens, Wen-mei W. Hwu
Guest Editors' Introduction. Int. J. Parallel Program. 24 (1) (1996)
Gary S. Tyson, Matthew K. Farrens, John Matthews, Andrew R. Pleszkun
A modified approach to data cache management. MICRO (1995)
Matthew K. Farrens, Gary S. Tyson, Andrew R. Pleszkun
A Study of Single-Chip Processor/Cache Organizations for Large Numbers of Transistors. ISCA (1994)
Gary S. Tyson, Matthew K. Farrens
Code scheduling for multiple instruction stream architectures. Int. J. Parallel Program. 22 (3) (1994)
Matthew K. Farrens, Pius Ng, Phil Nico
A comparision of superscalar and decoupled access/execute architectures. MICRO (1993)
Gary S. Tyson, Matthew K. Farrens
Techniques for extracting instruction level parallelism on MIMD architectures. MICRO (1993)
Matthew K. Farrens, Arvin Park, Allison Woodruff
CCHIME: A Cache Coherent Hybrid Interconnected Memory Extension. IPPS (1992)
Matthew K. Farrens, Arvin Park, Gary S. Tyson
Modifying VM hardware to reduce address pin requirements. MICRO (1992)
Matthew K. Farrens, Arvin Park, Rob Fanfelle, Pius Ng, Gary S. Tyson
A partitioned translation lookaside buffer approach to reducing address bandwith. ISCA (1992)
Gary S. Tyson, Matthew K. Farrens, Andrew R. Pleszkun
MISC: a Multiple Instruction Stream Computer. MICRO (1992)
Jeffrey C. Becker, Arvin Park, Matthew K. Farrens
An Analysis of the Information Content of Address Reference Streams. MICRO (1991)
Matthew K. Farrens, Arvin Park
Workload and Implementation Considerations for Dynamic Base Register Caching. MICRO (1991)
Matthew K. Farrens, Andrew R. Pleszkun
Implementation of the PIPE Processor. Computer 24 (1) (1991)
Matthew K. Farrens, Andrew R. Pleszkun
Strategies for Achieving Improved Processor Throughput. ISCA (1991)
Matthew K. Farrens, Brad Wetmore, Allison Woodruff
Alleviation of tree saturation in multistage interconnection networks. SC (1991)
Matthew K. Farrens, Arvin Park
Dynamic Base Register Caching: A Technique for Reducing Address Bus Width. ISCA (1991)
Matthew K. Farrens, Andrew R. Pleszkun
An evaluation of functional unit lengths for single-chip processors. MICRO (1990)
Arvin Park, Matthew K. Farrens
Address compression through base register caching. MICRO (1990)
Matthew K. Farrens, Andrew R. Pleszkun
Improving Performance of Small On-Chip Instruction Caches. ISCA (1989)