Juan Antonio Clemente

Publication Activity (10 Years)

Years Active: 2007-2024
Publications (10 Years): 13

Top Topics

Hardware Implementation

Hardware And Software

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Microprocess. Microsystems

IEEE Trans. Aerosp. Electron. Syst.

Publications

Daniel León, Juan Carlos Fabero, Juan Antonio Clemente
Non-intrusive study on FPGA of the SEU sensitivity on the COTS RISC-V VeeR EH1 soft processor from Western Digital. Microprocess. Microsystems 105 (2024)
Juan Carlos Fabero, Golnaz Korkian, Francisco J. Franco, Guillaume Hubert, Hortensia Mecha, Manon Letiche, Juan Antonio Clemente
SEE sensitivity of a COTS 28-nm SRAM-based FPGA under thermal neutrons and different incident angles. Microprocess. Microsystems 96 (2023)
Golnaz Korkian, Daniel León, Francisco J. Franco, Juan Carlos Fabero, Manon Letiche, Yolanda Morilla, Pedro Martin-Holgado, Helmut Puchner, Hortensia Mecha, Juan Antonio Clemente
Single Event Upsets Under Proton, Thermal, and Fast Neutron Irradiation in Emerging Nonvolatile Memories. IEEE Access 10 (2022)
Mohammadreza Rezaei, Francisco J. Franco, Juan Carlos Fabero, Hortensia Mecha, Helmut Puchner, Juan Antonio Clemente
Impact of DVS on Power Consumption and SEE Sensitivity of COTS Volatile SRAMs. LATS (2021)
Juan C. Fabero, Golnaz Korkian, Francisco J. Franco, Hortensia Mecha, Manon Letiche, Juan Antonio Clemente
Thermal Neutron-induced SEUs on a COTS 28-nm SRAM-based FPGA under Different Incident Angles. LATS (2021)
Guillaume Hubert, Sébastien Aubry, Juan Antonio Clemente
Impact of Ground-Level Enhancement (GLE) Solar Events on Soft Error Rate for Avionics. IEEE Trans. Aerosp. Electron. Syst. 56 (5) (2020)
Reza Ramezani, Juan Antonio Clemente, Francisco J. Franco
Analytical reliability estimation of SRAM-based FPGA designs against single-bit and multiple-cell upsets. Reliab. Eng. Syst. Saf. 202 (2020)
Javier Olivito, Felipe Serrano, Juan Antonio Clemente, Hortensia Mecha, Javier Resano
Analysis of the reconfiguration latency and energy overheads for a Xilinx Virtex-5 field-programmable gate array. IET Comput. Digit. Tech. 12 (4) (2018)
Reza Ramezani, Yasser Sedaghat, Mahmoud Naghibzadeh, Juan Antonio Clemente
A decomposition-based reliability and makespan optimization technique for hardware task graphs. Reliab. Eng. Syst. Saf. 180 (2018)
Reza Ramezani, Yasser Sedaghat, Juan Antonio Clemente
Reliability Improvement of Hardware Task Graphs via Configuration Early Fetch. IEEE Trans. Very Large Scale Integr. Syst. 25 (4) (2017)
Reza Ramezani, Yasser Sedaghat, Mahmoud Naghibzadeh, Juan Antonio Clemente
Reliability and Makespan Optimization of Hardware Task Graphs in Partially Reconfigurable Platforms. IEEE Trans. Aerosp. Electron. Syst. 53 (2) (2017)
Juan Antonio Clemente, Ruben Gran, Abel Chocano, Carlos del Prado, Javier Resano
Hardware Architectural Support for Caching Partitioned Reconfigurations in Reconfigurable Systems. IEEE Trans. Very Large Scale Integr. Syst. 24 (2) (2016)
Juan Antonio Clemente, Wassim Mansour, Rafic Ayoubi, Felipe Serrano, Hortensia Mecha, Haissam Ziade, Wassim El Falou, Raoul Velazco
Hardware implementation of a fault-tolerant Hopfield Neural Network on FPGAs. Neurocomputing 171 (2016)
Juan Antonio Clemente, Elena Perez Ramo, Javier Resano, Daniel Mozos, Francky Catthoor
Configuration Mapping Algorithms to Reduce Energy and Time Reconfiguration Overheads in Reconfigurable Systems. IEEE Trans. Very Large Scale Integr. Syst. 22 (6) (2014)
Juan Antonio Clemente, Javier Resano, Daniel Mozos
An approach to manage reconfigurations and reduce area cost in hard real-time reconfigurable systems. ACM Trans. Embed. Comput. Syst. 13 (4) (2014)
Juan Antonio Clemente, Ivan Beretta, Vincenzo Rana, David Atienza, Donatella Sciuto
A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms. ACM Trans. Reconfigurable Technol. Syst. 7 (2) (2014)
Juan Antonio Clemente, Daniel Mozos, Javier Resano
A Replacement Technique to Maximize Task Reuse in Reconfigurable Systems. IPDPS Workshops (2011)
Juan Antonio Clemente, Javier Resano, Carlos González, Daniel Mozos
A Hardware Implementation of a Run-Time Scheduler for Reconfigurable Systems. IEEE Trans. Very Large Scale Integr. Syst. 19 (7) (2011)
Juan Antonio Clemente, Vincenzo Rana, Donatella Sciuto, Ivan Beretta, David Atienza
A Hybrid Mapping-Scheduling Technique for Dynamically Reconfigurable Hardware. FPL (2011)
Juan Antonio Clemente, Carlos González, Javier Resano, Daniel Mozos
A task graph execution manager for reconfigurable multi-tasking systems. Microprocess. Microsystems 34 (2-4) (2010)
Juan Antonio Clemente, Carlos González, Javier Resano, Daniel Mozos
A Hardware Task-Graph Scheduler for Reconfigurable Multi-tasking Systems. ReConFig (2008)
Javier Resano, Juan Antonio Clemente, Carlos González, Daniel Mozos, Francky Catthoor
Efficiently scheduling runtime reconfigurations. ACM Trans. Design Autom. Electr. Syst. 13 (4) (2008)
Javier Resano, Juan Antonio Clemente, Carlos González, Jose Luis Garcia, Daniel Mozos
HW implementation of an execution manager for reconfigurable systems. ERSA (2007)