Thermal Neutron-induced SEUs on a COTS 28-nm SRAM-based FPGA under Different Incident Angles.
Juan C. FaberoGolnaz KorkianFrancisco J. FrancoHortensia MechaManon LeticheJuan Antonio ClementePublished in: LATS (2021)
Keyphrases
- power reduction
- leakage current
- electrical properties
- power consumption
- low power
- third party
- cmos technology
- high speed
- infrared
- real time image processing
- single chip
- data transmission
- low cost
- field programmable gate array
- hardware implementation
- power plant
- random access memory
- software components
- low power consumption
- parallel hardware
- real time
- verilog hdl
- power saving
- software implementation
- limited resources
- decision support
- power dissipation
- finite element analysis
- hardware architectures
- thermal imaging
- signal processing