Duo Sheng

Publication Activity (10 Years)

Years Active: 2000-2023
Publications (10 Years): 11

Top Topics

Ultrasound Imaging

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Microelectron. J.

Publications

Duo Sheng, Ying-Chi Chiu, Yun-Quan Li, You-Ning Lo, Chao-Kai Pai, Ten-Ling Wang
A Digital Receive Beamforming IC for High-Frequency Ultrasound Imaging System. ASICON (2023)
Duo Sheng, Chih-Hao Liu, Sih-Ying Chen, Bin-Yang Song, Ying-Chi Chiu, Ming-Han Cai
DLL-Based Transmit Beamforming IC for High -Frequency Ultrasound Medical Imaging System. ICCE-TW (2021)
Duo Sheng, Wei-Yen Chen, Hao-Ting Huang, Li Tai
Digitally Controlled Oscillator with High Timing Resolution and Low Complexity for Clock Generation. Sensors 21 (4) (2021)
Duo Sheng, Jun-Wei Lin, Yi-Hsiang Wang, Chih-Chung Huang
High-Resolution All-Digital Transmit Beamformer for High-Frequency and Wearable Ultrasound Imaging Systems. IEEE Trans. Very Large Scale Integr. Syst. 28 (2) (2020)
Duo Sheng, Wei-Yen Chen, Yu-Hsiang Chang, Hao-Ting Huang
High-Timing-Resolution and Low-Complexity Cell-Based Digitally Controlled Oscillator. ICCE-TW (2020)
Ching-Che Chung, Duo Sheng, Ming-Hsuan Li
Design of a human body channel communication transceiver using convolutional codes. Microelectron. J. 100 (2020)
Ching-Che Chung, Duo Sheng, Ming-Chieh Li, Yi-Che Tsai
A fast phase tracking reference-less all-digital CDR circuit for human body channel communication. Microelectron. J. 84 (2019)
Duo Sheng, Min-Rong Hong
A Low-Power All-Digital on-Chip CMOS Oscillator for a Wireless Sensor Node. Sensors 16 (10) (2016)
Duo Sheng, Hsiu-Fan Lai, Sheng-Min Chan, Min-Rong Hong
A High Resolution On-Chip Delay Sensor with Low Supply-Voltage Sensitivity for High-Performance Electronic Systems. Sensors 15 (2) (2015)
Ching-Che Chung, Duo Sheng, Chang-Jun Li
A Wide-Range Low-Cost All-Digital Duty-Cycle Corrector. IEEE Trans. Very Large Scale Integr. Syst. 23 (11) (2015)
Ching-Che Chung, Duo Sheng, Wei-Da Ho
A Low-Cost Low-Power All-Digital Spread-Spectrum Clock Generator. IEEE Trans. Very Large Scale Integr. Syst. 23 (5) (2015)
Ching-Che Chung, Duo Sheng, Chen-Han Chen
An all-digital phase-locked loop compiler with liberty timing files. VLSI-DAT (2014)
Ching-Che Chung, Duo Sheng, Sung-En Shen
High-Resolution All-Digital Duty-Cycle Corrector in 65-nm CMOS Technology. IEEE Trans. Very Large Scale Integr. Syst. 22 (5) (2014)
Duo Sheng, Ching-Che Chung, Hsiu-Fan Lai, Shu-Syun Jhao
High-resolution and all-digital on-chip delay measurement with low supply sensitivity for SoC applications. IEICE Electron. Express 11 (3) (2014)
Duo Sheng, Ching-Che Chung, Chih-Chung Huang, Jia-Wei Jian
A high-resolution and one-cycle conversion time-to-digital converter architecture for PET image applications. EMBC (2013)
Ching-Che Chung, Duo Sheng, Wei-Da Ho
A counter-based all-digital spread-spectrum clock generator with high EMI reduction in 65nm CMOS. IEICE Electron. Express 10 (6) (2013)
Ching-Che Chung, Duo Sheng, Wei-Siang Su
A 0.5V/1.0V fast lock-in ADPLL for DVFS battery-powered devices. VLSI-DAT (2013)
Ching-Che Chung, Duo Sheng, Chia-Lin Chang, Wei-Da Ho, Yang-Di Lin, Fang-Nien Lu
An All-Digital Large-N Audio Frequency Synthesizer for HDMI Applications. IEEE Trans. Circuits Syst. II Express Briefs (7) (2012)
Ching-Che Chung, Duo Sheng, Ning-Mi Hsueh
A high-performance wear-leveling algorithm for flash memory system. IEICE Electron. Express 9 (24) (2012)
Ching-Che Chung, Duo Sheng, Wei-Da Ho
A low-power and small-area all-digital spread-spectrum clock generator in 65nm CMOS technology. VLSI-DAT (2012)
Ching-Che Chung, Duo Sheng, Sung-En Shen
A wide-range all-digital duty-cycle corrector with output clock phase alignment in 65nm CMOS technology. IEICE Electron. Express 8 (15) (2011)
Ching-Che Chung, Duo Sheng, Chia-Lin Chang
A 600kHz to 1.2GHz all-digital delay-locked loop in 65nm CMOS technology. IEICE Electron. Express 8 (7) (2011)
Duo Sheng, Ching-Che Chung, Chen-Yi Lee
A Low-Power and Portable Spread Spectrum Clock Generator for SoC Applications. IEEE Trans. Very Large Scale Integr. Syst. 19 (6) (2011)
Duo Sheng, Ching-Che Chung, Chen-Yi Lee
Fast-lock all-digital DLL and digitally-controlled phase shifter for DDR controller applications. IEICE Electron. Express 7 (9) (2010)
Duo Sheng, Ching-Che Chung, Chen-Yi Lee
An all digital spread spectrum clock generator with programmable spread ratio for SoC applications. APCCAS (2008)
Duo Sheng, Ching-Che Chung, Chen-Yi Lee
An Ultra-Low-Power and Portable Digitally Controlled Oscillator for SoC Applications. IEEE Trans. Circuits Syst. II Express Briefs (11) (2007)
Duo Sheng, Ching-Che Chung, Chen-Yi Lee
A Fast-Lock-In ADPLL with High-Resolution and Low-Power DCO for SoC Applications. APCCAS (2006)
Jinn-Shyan Wang, Po-Hui Yang, Duo Sheng
Design of a 3-V 300-MHz low-power 8-b×8-b pipelined multiplier using pulse-triggered TSPC flip-flops. IEEE J. Solid State Circuits 35 (4) (2000)
Jinn-Shyan Wang, Pei-Lung Lin, Wern-Ho Sheen, Duo Sheng, Yu-Ming Huang
A compact adaptive equalizer IC for HIPERLAN system. ISCAS (2000)