David E. Schimmel

Publication Activity (10 Years)

Years Active: 1993-2006
Publications (10 Years): 0

Publications

Girish N. Patel, Michael S. Reid, David E. Schimmel, Stephen P. DeWeerth
An asynchronous architecture for modeling intersegmental neural communication. IEEE Trans. Very Large Scale Integr. Syst. 14 (2) (2006)
Christopher R. Clark, David E. Schimmel
Modeling the data-dependent performance of pattern-matching architectures. FPGA (2006)
Christopher R. Clark, David E. Schimmel
Scalable Pattern Matching for High Speed Networks. FCCM (2004)
Christopher R. Clark, David E. Schimmel
A pattern-matching co-processor for network intrusion detection systems. FPT (2003)
Joshua B. Fryman, Chad Huneycutt, Hsien-Hsin S. Lee, Kenneth M. Mackenzie, David E. Schimmel
Energy-Efficient Network Memory for Ubiquitous Devices. IEEE Micro 23 (5) (2003)
Christopher R. Clark, David E. Schimmel
Efficient Reconfigurable Logic Circuits for Matching Complex Network Intrusion Detection Patterns. FPL (2003)
Marc Necker, Didier Contis, David E. Schimmel
TCP-Stream Reassembly and State Tracking in Hardware. FCCM (2002)
Vivek Garg, David E. Schimmel
Hiding Communication Latency in Data Parallel Applications. IPPS/SPDP (1998)
David E. Schimmel, Chryssa Dislis
Guest Editors' Introduction: Early Modeling and Analysis of Packaged Systems. IEEE Des. Test Comput. 15 (3) (1998)
Vivek Garg, David E. Schimmel
Performance modeling of dense Cholesky factorization on the MasPar MP-2. Concurr. Pract. Exp. 9 (7) (1997)
Chirag S. Patel, Sek M. Chai, Sudhakar Yalamanchili, David E. Schimmel
Power/Performance Trade-offs for Direct Networks. PCRCW (1997)
Chirag S. Patel, Sek M. Chai, Sudhakar Yalamanchili, David E. Schimmel
Power Constrained Design of Multiprocessor Interconnection Networks. ICCD (1997)
Stephen P. DeWeerth, Girish N. Patel, Mario F. Simoni, David E. Schimmel, Ronald L. Calabrese
A VLSI Architecture for Modeling Intersegmental Coordination. ARVLSI (1997)
Vivek Garg, David E. Schimmel
CCSIMD: A Concurrent Communication and Computation Framework for SIMD Machines. PCRCW (1997)
Vivek Garg, Steve Lacy, David E. Schimmel, Darrell Stogner, Craig D. Ulmer, D. Scott Wills, Sudhakar Yalamanchili
Incorporating Multi-Chip Module Packaging Constraints into System Design. ED&TC (1996)
James D. Allen, David E. Schimmel
Improving Memory Performance for Indirect Accesses on SIMD Computers. IPPS (1996)
Patrick T. Gaughan, Binh Vien Dao, Sudhakar Yalamanchili, David E. Schimmel
Distributed Deadlock-Free Routing in Faulty, Pipelined, Direct Interconnection Networks. IEEE Trans. Computers 45 (6) (1996)
James D. Allen, David E. Schimmel
Issues in the Design of High Performance SIMD Architectures. IEEE Trans. Parallel Distributed Syst. 7 (8) (1996)
James D. Allen, David E. Schimmel
The impact of pipelining on SIMD architectures. IPPS (1995)
Vivek Garg, David E. Schimmel
Architectural support for inter-stream communication in an MSIMD system. Future Gener. Comput. Syst. 11 (6) (1995)
Bruce C. Kim, Abhijit Chatterjee, Madhavan Swaminathan, David E. Schimmel
A Novel Low-Cost Approach to MCM Interconnect Test. ITC (1995)
Vivek Garg, David E. Schimmel
Architectural Support for Inter-Stream Communication in a MSIMD System. HPCA (1995)
Hatem Sellami, James D. Allen, David E. Schimmel, Sudhakar Yalamanchili
Simulation of Marked Graphs on SIMD Architectures Using Efficient Memory Management. MASCOTS (1994)
Paul J. Bond, Bruce C. Kim, Christopher A. Lee, David E. Schimmel
A Methodology for Generation and Collection of Multiprocessor Traces. MASCOTS (1994)
James D. Allen, Patrick T. Gaughan, David E. Schimmel, Sudhakar Yalamanchili
Ariadne - An Adaptive Router for Fault-Tolerant Multicomputers. ISCA (1994)
James D. Allen, Vivek Garg, David E. Schimmel
Analysis of Control Parallelism in SIMD Instruction Streams. SPDP (1993)