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Incorporating Multi-Chip Module Packaging Constraints into System Design.
Vivek Garg
Steve Lacy
David E. Schimmel
Darrell Stogner
Craig D. Ulmer
D. Scott Wills
Sudhakar Yalamanchili
Published in:
ED&TC (1996)
Keyphrases
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design process
high speed
single chip
constrained optimization
database
low cost
case study
design methodology
real time
operating system
high density
linear constraints
modular design
analog vlsi
phase locked loop