Chin-Cheng Kuo

Publication Activity (10 Years)

Years Active: 2005-2012
Publications (10 Years): 0

Top Topics

Analog Circuits

Depth First Search

Top Venues

ACM Trans. Design Autom. Electr. Syst.

Publications

Chien-Nan Jimmy Liu, Yen-Lung Chen, Chin-Cheng Kuo, I-Ching Tsai
A fast heuristic approach for parametric yield enhancement of analog designs. ACM Trans. Design Autom. Electr. Syst. 17 (3) (2012)
Chin-Cheng Kuo, Wei-Yi Hu, Yi-Hung Chen, Jui-Feng Kuan, Yi-Kan Cheng
Efficient trimmed-sample Monte Carlo methodology and yield-aware design flow for analog circuits. DAC (2012)
Chin-Cheng Kuo, Chien-Nan Jimmy Liu
Fast and Accurate Analysis of Supply Noise Effects in PLL With Noise Interactions. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2010)
Chin-Cheng Kuo, Yen-Lung Chen, I-Ching Tsai, Li-Yu Chan, Chien-Nan Jimmy Liu
Behavior-level yield enhancement approach for large-scaled analog circuits. DAC (2010)
Kuo-Hsing Cheng, Yu-Chang Tsai, Chien-Nan Jimmy Liu, Kai-Wei Hong, Chin-Cheng Kuo
A Low Jitter Self-Calibration PLL for 10-Gbps SoC Transmission Links Application. IEICE Trans. Electron. (7) (2009)
Chin-Cheng Kuo, Meng-Jung Lee, Chien-Nan Jimmy Liu, Ching-Ji Huang
Fast Statistical Analysis of Process Variation Effects Using Accurate PLL Behavioral Models. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2009)
Chin-Cheng Kuo, Pei-Syun Lin, Chien-Nan Jimmy Liu
A SCORE macromodel for PLL designs to analyze supply noise interaction issues at behavioral level. ASP-DAC (2009)
Chin-Cheng Kuo, Yu-Chien Wang, Chien-Nan Jimmy Liu
An Efficient Approach to Build Accurate Behavioral Models of PLL Designs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2006)
Chin-Cheng Kuo, Chien-Nan Jimmy Liu
On Efficient Behavioral Modeling to Accurately Predict Supply Noise Effects of PLL Designs in Real Systems. VLSI-SoC (2006)
Chin-Cheng Kuo, Yu-Chien Wang, Chien-Nan Jimmy Liu
An efficient bottom-up extraction approach to build accurate PLL behavioral models for SOC designs. ACM Great Lakes Symposium on VLSI (2005)