Carlos Jesús Jiménez-Fernández

Publication Activity (10 Years)

Years Active: 1995-2024
Publications (10 Years): 15

Top Topics

Countermeasures

Fpga Implementation

Power Reduction

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Luis F. Rojas-Muñoz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Eros Camacho-Ruiz, Pablo Navarro-Torrero, Apurba Karmakar, Carlos Fernández García, Erica Tena-Sánchez, Francisco Eugenio Potestad-Ordóñez, Alejandro Casado-Galán, Pau Ortega-Castro, Antonio Acosta-Jiménez, Carlos Jesús Jiménez-Fernández, Piedad Brox
Cryptographic Security Through a Hardware Root of Trust. ARC (2024)
Carlos Fernández-García, José Miguel Mora-Gutierrez, Carlos Jesús Jiménez-Fernández
TinyJAMBU Hardware Implementation for Low Power. IEEE Access 12 (2024)
Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, Antonio J. Acosta, Carlos Jesús Jiménez-Fernández, Ricardo Chaves
Design and Evaluation of Countermeasures Against Fault Injection Attacks and Power Side-Channel Leakage Exploration for AES Block Cipher. IEEE Access 10 (2022)
Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, José Miguel Mora-Gutierrez, Manuel Valencia-Barrero, Carlos Jesús Jiménez-Fernández
Trivium Stream Cipher Countermeasures Against Fault Injection Attacks and DFA. IEEE Access 9 (2021)
Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, José Miguel Mora-Gutierrez, Manuel Valencia-Barrero, Carlos Jesús Jiménez-Fernández
Experimental FIA Methodology Using Clock and Control Signal Modifications under Power Supply and Temperature Variations. Sensors 21 (22) (2021)
Francisco Eugenio Potestad-Ordóñez, Manuel Valencia-Barrero, Carmen Baena Oliva, Pilar Parra Fernández, Carlos Jesús Jiménez-Fernández
Breaking Trivium Stream Cipher Implemented in ASIC Using Experimental Attacks and DFA. Sensors 20 (23) (2020)
José Miguel Mora-Gutierrez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero
ASIC Design and Power Characterization of Standard and Low Power Multi-Radix Trivium. IEEE Trans. Circuits Syst. (11) (2020)
Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, R. Chaves, Manuel Valencia-Barrero, Antonio Acosta-Jiménez, Carlos Jesús Jiménez-Fernández
Hamming-Code Based Fault Detection Design Methodology for Block Ciphers. ISCAS (2020)
Carlos Jesús Jiménez-Fernández, Carmen Baena Oliva, Pilar Parra Fernández, Francisco Eugenio Potestad-Ordóñez, Manuel Valencia-Barrero
An Academic Approach to FPGA Design Based on a Distance Meter Circuit. Rev. Iberoam. de Tecnol. del Aprendiz. 15 (3) (2020)
Francisco Eugenio Potestad-Ordóñez, Carlos Jesús Jiménez-Fernández, Carmen Baena Oliva, Pilar Parra Fernández, Manuel Valencia-Barrero
Floorplanning as a practical countermeasure against clock fault attack in Trivium stream cipher. DCIS (2018)
José Miguel Mora-Gutierrez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero
Trivium hardware implementations for power reduction. Int. J. Circuit Theory Appl. 45 (2) (2017)
José Miguel Mora-Gutierrez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero
Multiradix Trivium Implementations for Low-Power IoT Hardware. IEEE Trans. Very Large Scale Integr. Syst. 25 (12) (2017)
Francisco Eugenio Potestad-Ordóñez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero
Vulnerability Analysis of Trivium FPGA Implementations. IEEE Trans. Very Large Scale Integr. Syst. 25 (12) (2017)
Antonio J. Acosta, Erica Tena-Sánchez, Carlos Jesús Jiménez-Fernández, Javier M. Mora-Merchan
Power and Energy Issues on Lightweight Cryptography. J. Low Power Electron. 13 (3) (2017)
Francisco Eugenio Potestad-Ordóñez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero
Fault attack on FPGA implementations of Trivium stream cipher. ISCAS (2016)
Piedad Brox, Javier Castro-Ramirez, Macarena C. Martínez-Rodríguez, Erica Tena, Carlos Jesús Jiménez-Fernández, Iluminada Baturone, Antonio J. Acosta
A Programmable and Configurable ASIC to Generate Piecewise-Affine Functions Defined Over General Partitions. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2013)
José Miguel Mora-Gutierrez, Carlos Jesús Jiménez-Fernández, Manuel Valencia-Barrero
Low Power Implementation of Trivium Stream Cipher. PATMOS (2012)
Alejandro Cabrera, Santiago Sánchez-Solano, Raouf Senhadji, Angel Barriga, Carlos Jesús Jiménez-Fernández
Hardware/software codesign methodology for fuzzy controller implementation. FUZZ-IEEE (2002)
Carmen Baena Oliva, Jorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, Carlos Jesús Jiménez-Fernández, Manuel Valencia
Measurement of the Switching Activity of CMOS Digital Circuits at the Gate Level. PATMOS (2002)
Santiago Sánchez-Solano, Raouf Senhadji, Alejandro Cabrera Sarmiento, Iluminada Baturone, Carlos Jesús Jiménez-Fernández, Angel Barriga
Prototyping of Fuzzy Logic-Based Controllers Using Standard FPGA Development Boards. IEEE International Workshop on Rapid System Prototyping (2002)
Angel Barriga, Raouf Senhadji, Carlos Jesús Jiménez-Fernández, Iluminada Baturone, Santiago Sánchez-Solano
A design methodology for application specific fuzzy integrated circuits. ICECS (1998)
E. Lago, Carlos Jesús Jiménez-Fernández, Diego R. López, Santiago Sánchez-Solano, Angel Barriga
XFVHDL: A Tool for the Synthesis of Fuzzy Logic Controllers. DATE (1998)
D. Galán, Carlos Jesús Jiménez-Fernández, Angel Barriga, Santiago Sánchez-Solano
VHDL package for description of fuzzy logic controllers. EURO-DAC (1995)