Biplab K. Sikdar

ORCID

Publication Activity (10 Years)

Years Active: 2000-2024
Publications (10 Years): 43

Top Venues

Publications

Avishek Choudhury, Brototi Mondal, Kolin Paul, Biplab K. Sikdar
LLC Block Reuse Predictor Design using Deep Learning to Mitigate Soft Error in Multicore. VLSID (2024)
Mahabub Hasan Mahalat, Shyam Subba, Anindan Mondal, Biplab K. Sikdar, Rajat Subhra Chakraborty, Bibhash Sen
CAPUF: Design of a configurable circular arbiter PUF with enhanced security and hardware efficiency. Integr. 95 (2024)
Avishek Choudhury, Brototi Mondal, Kolin Paul, Biplab K. Sikdar
Energy efficiency in multicore shared cache by fault tolerance using a genetic algorithm based block reuse predictor. Microprocess. Microsystems 101 (2023)
Sourav Roy, Dipnarayan Das, Anindan Mondal, Mahabub Hasan Mahalat, Bibhash Sen, Biplab K. Sikdar
PLAKE: PUF-Based Secure Lightweight Authentication and Key Exchange Protocol for IoT. IEEE Internet Things J. 10 (10) (2023)
Baisakhi Das, Mousumi Saha, Nilanjana Das, Biplab K. Sikdar
Identification of Periodic Boundary SACA Rules Exploring NSRT Diagram. ACRI (2022)
Amit Kumar Pramanik, Jayanta Pal, Biplab K. Sikdar, Bibhash Sen
Performance Analysis of Regular Clocking Based Quantum-Dot Cellular Automata Logic Circuit: Fault Tolerant Approach. ACRI (2022)
Nilanjana Das, Riom Sen, Dwaipayan Ray, Nandini Banerjee, Joy Halder, Hannu Tenhunen, Biplab K. Sikdar
A trojan framework in AES core to evade state-of-the-art HT detection schemes. Microelectron. J. 111 (2021)
Supreeti Kamilya, Sukanta Das, Biplab K. Sikdar
Simulation of Non-uniform Cellular Automata by Classical Cellular Automata and Its Application in Embedded Systems. J. Cell. Autom. 16 (1-2) (2021)
Bidesh Chakraborty, Mamata Dalui, Biplab K. Sikdar
Synthesis of Scalable Single Length Cycle, Single Attractor Cellular Automata in Linear Time. Complex Syst. 30 (3) (2021)
Avishek Choudhury, Biplab K. Sikdar
Modeling Remapping Based Fault Tolerance Techniques for Chip Multiprocessor Cache with Design Space Exploration. J. Electron. Test. 36 (1) (2020)
Nilanjana Das, Joy Halder, Baisakhi Das, Biplab K. Sikdar
Exploring Hard to Detect Sequential Hardware Trojans. VDAT (2020)
Jayanta Paul, Rajat Subhra Bhowmick, Riom Sen, Dwaipayan Ray, Suman S. Manjhi, Soumya Sen, Biplab K. Sikdar
Evaluation of Face Recognition Schemes for Low-computation IoT System Design. VDAT (2020)
Avishek Choudhury, Brototi Mondal, Biplab K. Sikdar
Latency Aware Fault Tolerant Cache in Multicore Using Dynamic Remapping Clusters. ATS (2019)
Avishek Choudhury, Biplab K. Sikdar
Soft Error Resilience in Chip Multiprocessor Cache using a Markov Model Based Re-usability Predictor. ICCD (2019)
Avishek Choudhury, Biplab K. Sikdar
CORE-VR: A Coherence and Reusability Aware Low Voltage Fault Tolerant Cache in Multicore. DFT (2019)
Baisakhi Das, Nilanjana Das, Biplab K. Sikdar
Effect of Trojans on Write Data Access in Memory. ISED (2019)
Bidesh Chakraborty, Mamata Dalui, Biplab K. Sikdar
Cellular Automata Based Test Design for Coherence Verification in 3D Caches. J. Circuits Syst. Comput. 28 (9) (2019)
Supreeti Kamilya, Sumit Adak, Sukanta Das, Biplab K. Sikdar
SACAs: (Non-uniform) Cellular Automata that Converge to a Single Fixed Point. J. Cell. Autom. 14 (1-2) (2019)
Baisakhi Das, Mamata Dalui, Anupama Mondal, Salma Mandi, Nilanjana Das, Biplab K. Sikdar
Evaluation of Misspeculation Impact on Chip-Multiprocessors Power Overhead. ICSCA (2018)
Avishek Choudhury, Brototi Mondal, Biplab K. Sikdar
ReMiT: Redundancy Migration for Latency Aware Fault Tolerant Cache Design in Multicore. ISED (2018)
Avishek Choudhury, Biplab K. Sikdar
Modeling & Analysis of Redundancy Based Fault Tolerance for Permanent Faults in Chip Multiprocessor Cache. VLSI Design (2018)
Bidesh Chakraborty, Mamata Dalui, Biplab K. Sikdar
Design of a Reliable Cache System for Heterogeneous CMPs. J. Circuits Syst. Comput. 27 (14) (2018)
Nilanjana Das, Mousumi Saha, Biplab K. Sikdar
Hard to Detect Combinational Hardware Trojans. ISED (2018)
Baisakhi Das, Nilanjana Das, Biplab K. Sikdar
Stuck-At 0/1 Trojans on Return Address Stack. ISED (2018)
Baisakhi Das, Biplab K. Sikdar
Evaluating impact on CMPs' power for design inaccuracy diagnosis. Int. J. Comput. Appl. Technol. 56 (3) (2017)
Avishek Choudhury, Biplab K. Sikdar
CIFR: A complete in-place fault remapping strategy for CMP cache using dynamic reuse distance. ISED (2017)
Avishek Choudhury, Biplab K. Sikdar
Performance Analysis of Disability Based Fault Tolerance Techniques for Permanent Faults in Chip Multiprocessors. VDAT (2017)
Rajdeep Kumar Nath, Bibhash Sen, Biplab K. Sikdar
Optimal synthesis of QCA logic circuit eliminating wire-crossings. IET Circuits Devices Syst. 11 (3) (2017)
Sutapa Sarkar, Mousumi Saha, Biplab K. Sikdar
Multi-bit fault tolerant design for resistive memories through dynamic partitioning. EWDTS (2017)
Mousumi Saha, Baisakhi Das, Biplab K. Sikdar
Periodic boundary cellular automata based test structure for memory. EWDTS (2017)
Mrinal Goswami, Bibhash Sen, Rijoy Mukherjee, Biplab K. Sikdar
Design of Testable Adder in Quantum-dot Cellular Automata with Fault Secure Logic. Microelectron. J. 60 (2017)
Bidesh Chakraborty, Mamata Dalui, Biplab K. Sikdar
Design of Coherence Verification Unit for Heterogeneous CMPs Integrating Update and Invalidate Protocols. VLSI Design (2017)
Mamata Dalui, Biplab K. Sikdar
A cellular automata based self-correcting protocol processor for scalable CMPs. Microelectron. J. 62 (2017)
Saha Mousumi, Mamata Dalui, Biplab K. Sikdar
. Microelectron. J. 52 (2016)
Bidesh Chakraborty, Mamata Dalui, Biplab K. Sikdar
Design of coherence verification unit for CMPs realizing dragon protocol. VDAT (2016)
Mamata Dalui, Biplab K. Sikdar
A Cache System Design for CMPs with Built-In Coherence Verification. VLSI Design 2016 (2016)
Mrinal Goswami, Bibhash Sen, Biplab K. Sikdar
Design of low power 5-input majority voter in quantum-dot cellular automata with effective error resilience. ISED (2016)
Bidesh Chakraborty, Mamata Dalui, Biplab K. Sikdar
CA based protocol processor for heterogeneous CMPs. ISED (2016)
Bibhash Sen, Yashraj Sahu, Rijoy Mukherjee, Rajdeep Kumar Nath, Biplab K. Sikdar
On the reliability of majority logic structure in quantum-dot cellular automata. Microelectron. J. 47 (2016)
Bibhash Sen, Rajdeep Kumar Nath, Rijoy Mukherjee, Yashraj Sahu, Biplab K. Sikdar
Towards Designing Reliable Universal QCA Logic in the Presence of Cell Deposition Defect. VLSI Design (2016)
Baisakhi Das, Supreeti Kamilya, Biplab K. Sikdar
Design of CA based scheme for evenhanded data migration in CMPs. ISED (2016)
Mousumi Saha, Sutapa Sarkar, Biplab K. Sikdar
Cellular automata based fault tolerant resistive memory design. ISED (2016)
Mamata Dalui, Tannishtha Som, Shivani Bansal, Shivam Pant, Biplab K. Sikdar
MASI: An eviction aware cache coherence protocol for CMPs. ISED (2016)
Rajdeep Kumar Nath, Bibhash Sen, Rachit Daga, Nilesh Chakraborty, Harsh Tibrewal, Biplab K. Sikdar
Fault masking in Quantum-dot cellular automata using prohibitive logic circuit. VDAT (2015)
Bibhash Sen, Mrinal Goswami, Subhra Mazumdar, Biplab K. Sikdar
Towards modular design of reliable quantum-dot cellular automata logic circuit using multiplexers. Comput. Electr. Eng. 45 (2015)
Bidesh Chakraborty, Bhanu Pratap Singh, M. Chinnapureddy, Mamata Dalui, Biplab K. Sikdar
Design of coherence verification unit for heterogeneous CMPs. VDAT (2015)
Bibhash Sen, Anirban Nag, Asmit De, Biplab K. Sikdar
Towards the hierarchical design of multilayer QCA logic circuit. J. Comput. Sci. 11 (2015)
Saha Mousumi, Biplab K. Sikdar
A Cellular Automata Based Fault Tolerant Approach in Designing Test Hardware for L1 Cache Module. ISVLSI (2015)
Saha Mousumi, Navneet Kumar Gautam, Biplab K. Sikdar
A fault tolerant test hardware for L1 cache module in tile CMPs architecture. VDAT (2015)
Bibhash Sen, Manojit Dutta, Samik Some, Biplab K. Sikdar
Realizing Reversible Computing in QCA Framework Resulting in Efficient Design of Testable ALU. ACM J. Emerg. Technol. Comput. Syst. 11 (3) (2014)
Bibhash Sen, Manojit Dutta, Biplab K. Sikdar
Efficient design of parity preserving logic in quantum-dot cellular automata targeting enhanced scalability in testing. Microelectron. J. 45 (2) (2014)
Mamata Dalui, Biplab K. Sikdar
CA Based Scalable Protocol Processor for Chip Multiprocessors. ISED (2014)
Bibhash Sen, Rijoy Mukherjee, Rajdeep Kumar Nath, Biplab K. Sikdar
Design of Fault Tolerant Universal Logic in QCA. ISED (2014)
Bibhash Sen, Manojit Dutta, Mrinal Goswami, Biplab K. Sikdar
Modular Design of testable reversible ALU by QCA multiplexer with increase in programmability. Microelectron. J. 45 (11) (2014)
Mamata Dalui, Keshav Gupta, Biplab K. Sikdar
Directory based cache coherence verification logic in CMPs cache system. MES (2013)
Bibhash Sen, Mrinal Goswami, Samik Some, Biplab K. Sikdar
Design of Sequential Circuits in Multilayer QCA Structure. ISED (2013)
Saha Mousumi, Biplab K. Sikdar
. HPCS (2013)
Mamata Dalui, Biplab K. Sikdar
Design of directory based cache coherence protocol verification logic in CMPs around TACA. HPCS (2013)
Sukanta Das, Biplab K. Sikdar
Analysis and synthesis of nonlinear reversible cellular automata in linear time. CoRR (2013)
Baisakhi Das, Nirmalya Sundar Maiti, Sukanta Das, Mousumi Saha, Biplab K. Sikdar
Design of an Efficient Scheme for Data Migration in Chip-Multiprocessors. ISED (2013)
Nazma Naskar, Sukanta Das, Biplab K. Sikdar
Characterization of Nonlinear Cellular Automata Having Only Single Length Cycle Attractors. J. Cell. Autom. 7 (5-6) (2012)
Bibhash Sen, Manojit Dutta, Debajyoty Banik, Dipak K. Singh, Biplab K. Sikdar
Design of Fault Tolerant Reversible Arithmetic Logic Unit in QCA. ISED (2012)
Bibhash Sen, Manojit Dutta, Divyam Saran, Biplab K. Sikdar
An Efficient Multiplexer in Quantum-dot Cellular Automata. VDAT (2012)
Sukanta Das, Anindita Sarkar, Biplab K. Sikdar
Synthesis of Reversible Asynchronous Cellular Automata for Pattern Generation with Specific Hamming Distance. ACRI (2012)
Sukanta Das, Avik Chakraborty, Biplab K. Sikdar
Counting Cycles in Reversible Cellular Automata. ACRI (2012)
Nirmalya Sundar Maiti, Soumyabrata Ghosh, Biplab K. Sikdar, Parimal Pal Chaudhuri
Rule Vector Graph (RVG) To Design Linear Time Algorithm for Identifying the Invertibility of Periodic-Boundary Three Neighborhood Cellular Automata. J. Cell. Autom. 7 (4) (2012)
Mousumi Saha, Souvik Das, Biplab K. Sikdar
High Speed Hardware for March C¯. ISED (2012)
Mamata Dalui, Biplab K. Sikdar
An Efficient Test Design for CMPs Cache Coherence Realizing MESI Protocol. VDAT (2012)
Nasiruddin Khan, Ilora Maity, Sukanta Das, Biplab K. Sikdar
A Cellular Automata Based Scheme for Energy Efficient Fault Diagnosis in WSN. ACRI (2012)
Mamata Dalui, Biplab K. Sikdar
A Test Design for Quick Determination of Incoherency in Chip Multiprocessors' Cache Realizing MOESI Protocol. ISED (2012)
Gunjan Bhattacharya, Ilora Maity, Biplab K. Sikdar, Baisakhi Das
Exploring Impact of Faults on Branch Predictors' Power for Diagnosis of Faulty Module. Asian Test Symposium (2011)
Mamata Dalui, Biplab K. Sikdar
An Efficient Test Design for Verification of Cache Coherence in CMPs. DASC (2011)
Bibhash Sen, Divyam Saran, Mousumi Saha, Biplab K. Sikdar
Synthesis of Reversible Universal Logic around QCA with Online Testability. ISED (2011)
Ilora Maity, Gunjan Bhattacharya, Sukanta Das, Biplab K. Sikdar
A cellular automata based scheme for diagnosis of faulty nodes in WSN. SMC (2011)
Soumyabrata Ghosh, Nirmalya Sundar Maiti, Parimal Pal Chaudhuri, Biplab K. Sikdar
On Invertible Three Neighborhood Null-Boundary Uniform Cellular Automata. Complex Syst. 20 (1) (2011)
Baisakhi Das, Gunjan Bhattacharya, Ilora Maity, Biplab K. Sikdar
Impact of Inaccurate Design of Branch Predictors on Processors' Power Consumption. DASC (2011)
Nirmalya Sundar Maiti, Soumyabrata Ghosh, Biplab K. Sikdar, Parimal Pal Chaudhuri
Programmable Cellular Automata (PCA) Based Advanced Encryption Standard (AES) Hardware Architecture. ACRI (2010)
Mamata Dalui, Suhrid Bakshi, Biplab K. Sikdar
CA based quick consensus in distributed system through network partitioning. SMC (2010)
Bibhash Sen, Anik Sengupta, Mamata Dalui, Biplab K. Sikdar
Design of Testable Universal Logic Gate Targeting Minimum Wire-Crossings in QCA Logic Circuit. DSD (2010)
Bibhash Sen, Mamata Dalui, Biplab K. Sikdar
Introducing universal QCA logic gate for synthesizing symmetric functions with minimum wire-crossings. ICWET (2010)
Sukanta Das, Biplab K. Sikdar
A Scalable Test Structure for Multicore Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (1) (2010)
Indrajit Banerjee, Sukanta Das, Hafizur Rahaman, Biplab K. Sikdar, Mamata Dalui
SSMCA: CA based Segmented Sensor Network Management scheme. SMC (2010)
Sukanta Das, Nazma Naskar, Sukanya Mukherjee, Mamata Dalui, Biplab K. Sikdar
Characterization of CA Rules for SACA Targeting Detection of Faulty Nodes in WSN. ACRI (2010)
Sukanta Das, Nazma Naskar, Sukanya Mukherjee, Biplab K. Sikdar
CA Rules Identification for Efficient Design of Pattern Classifier. CSC (2009)
Sukanta Das, Sukanya Mukherjee, Nazma Naskar, Biplab K. Sikdar
Characterization of Single Cycle CA and its Application in Pattern Classification. Electron. Notes Theor. Comput. Sci. 252 (2009)
Sukanta Das, Biplab K. Sikdar
CA Based Built-In Self-Test Structure for SoC. Asian Test Symposium (2009)
Sukanta Das, Sukanya Mukherjee, Nazma Naskar, Biplab K. Sikdar
Modeling Single Length Cycle Nonlinear Cellular Automata for Pattern Recognition. NaBIC (2009)
Sukanta Das, Biplab K. Sikdar
Characterization of 1-d Periodic Boundary Reversible CA. Electron. Notes Theor. Comput. Sci. 252 (2009)
Sukanta Das, Chandrama Shaw, Biplab K. Sikdar
Exploring CAState Space to Synthesize Cellular Automata with Specified Attractor Set. ACRI (2008)
Debashis Moitra, Sandip Dhar, J. M. Mallick, S. Sadhu, Biplab K. Sikdar
Cellular Automata Based Design of Cost Optimal Steel Building Frames. Fundam. Informaticae 87 (2) (2008)
Niloy Ganguly, Biplab K. Sikdar, Parimal Pal Chaudhuri
Exploring Cycle Structures of Additive Cellular Automata. Fundam. Informaticae 87 (2) (2008)
Sukanta Das, Biplab K. Sikdar
Characterization of Non-reachable States in Irreversible CAState Space. ACRI (2008)
Debashis Moitra, Sandip Dhar, J. M. Mallick, Biplab K. Sikdar
Cellular Automata Model for Cost Optimal Design of Steel Building Frames. IICAI (2007)
Hafizur Rahaman, Jimson Mathew, Biplab K. Sikdar, Dhiraj K. Pradhan
Transition Fault Testability in Bit Parallel Multipliers over GF(2^{m}). VTS (2007)
Sukanta Das, DasBit Sipra, Biplab K. Sikdar
CA Based Data Servicing In Cellular Mobile Network. ICWN (2007)
Chandrama Shaw, Sukanta Das, Biplab K. Sikdar
Cellular Automata Based Encoding Technique for Wavelet Transformed Data Targeting Still Image Compression. ACRI (2006)
Sukanta Das, Biplab K. Sikdar
Rules Targeting Synthesis of Reversible Cellular Automata. ACRI (2006)
Biplab K. Sikdar
Study of N-Detectability in QCA Designs. ATS (2006)
Indrajit Banerjee, Sukanta Das, Hafizur Rahaman, Biplab K. Sikdar
An Energy Effilcient Monitoring of Ad-Hoc Sensor Network with Cellular Automata. SMC (2006)
Sukanta Das, Anirban Kundu, Biplab K. Sikdar, Parimal Pal Chaudhuri
Design of Nonlinear CA Based TPG Without Prohibited Pattern Set In Linear Time. J. Electron. Test. 21 (1) (2005)

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Publication Activity (10 Years)

Top Topics

Top Venues

Biplab K. Sikdar