Jayanta Pal

Publication Activity (10 Years)

Years Active: 2008-2024
Publications (10 Years): 13

Top Topics

Genetic Algorithm

Power Dissipation

Cellular Automata

Delay Insensitive

Top Venues

Comput. Electr. Eng.

J. Circuits Syst. Comput.

Publications

Amit Kumar Pramanik, Jayanta Pal, Bibhash Sen
Synthesis of Fault-Tolerant QCA Logic Circuit Using Cellular Automata. ASCAT (2024)
Amit Kumar Pramanik, Sudipta Debnath, Jayanta Pal, Bibhash Sen
Design and Analysis of Regular Clock Based 2: 4 Decoder Using T-Gate in QCA. ASCAT (2023)
Jayanta Pal, Sourav Saha, Bansibadan Maji, Dilip Kumar Bhattacharya
PTGAC Model: A machine learning approach for constructing phylogenetic tree to compare protein sequences. J. Bioinform. Comput. Biol. 21 (1) (2023)
Amit Kumar Pramanik, Mahabub Hasan Mahalat, Jayanta Pal, Seyed-Sajad Ahmadpour, Bibhash Sen
Cost-effective synthesis of QCA logic circuit using genetic algorithm. J. Supercomput. 79 (4) (2023)
Amit Kumar Pramanik, Jayanta Pal, Biplab K. Sikdar, Bibhash Sen
Performance Analysis of Regular Clocking Based Quantum-Dot Cellular Automata Logic Circuit: Fault Tolerant Approach. ACRI (2022)
Amit Kumar Pramanik, Jayanta Pal, Bibhash Sen
Impact of Genetic Algorithm on Low Power QCA Logic Circuit with Regular Clocking. ASCAT (2022)
Amit Kumar Pramanik, Dhrubajyoti Bhowmik, Jayanta Pal, Pinaki Sen, Apu Kumar Saha, Bibhash Sen
Towards the realization of regular clocking-based QCA circuits using genetic algorithm. Comput. Electr. Eng. 97 (2022)
Dhrubajyoti Bhowmik, Amit Kumar Pramanik, Jayanta Pal, Pinaki Sen, Ayush Ranjan Singh, Apu Kumar Saha, Bibhash Sen
Regular clocking-based Automated Cell Placement technique in QCA targeting sequential circuit. Comput. Electr. Eng. 98 (2022)
Jayanta Pal, Mrinal Goswami, Apu Kumar Saha, Bibhash Sen
CFA: Toward the Realization of Conservative Full Adder in QCA with Enhanced Reliability. J. Circuits Syst. Comput. 30 (10) (2021)
Jayanta Pal, Mrinal Goswami, Apu Kumar Saha, Bibhash Sen
CFA: Toward the Realization of Conservative Full Adder in QCA with Enhanced Reliability. J. Circuits Syst. Comput. 30 (11) (2021)
Dhrubajyoti Bhowmik, Jayanta Pal, Mrinal Goswami, Pinaki Sen, Apu Kumar Saha, Bibhash Sen
Systematic cell placement in quantum-dot cellular automata embedding underlying regular clocking circuit. IET Circuits Devices Syst. 15 (2) (2021)
Mrinal Goswami, Jayanta Pal, Mayukh Roy Choudhury, Pritam P. Chougule, Bibhash Sen
In memory computation using quantum-dot cellular automata. IET Comput. Digit. Tech. 14 (6) (2020)
Amit Kumar Singha, Santanu Kapat, Soumitro Banerjee, Jayanta Pal
Nonlinear Analysis of Discretization Effects in a Digital Current Mode Controlled Boost Converter. IEEE J. Emerg. Sel. Topics Circuits Syst. 5 (3) (2015)
Munmun Khanra, Jayanta Pal, Karabi Biswas
Reduced Order Approximation of MIMO Fractional Order Systems. IEEE J. Emerg. Sel. Topics Circuits Syst. 3 (3) (2013)
Munmun Khanra, Jayanta Pal, Karabi Biswas
Use of squared magnitude function in approximation and hardware implementation of SISO fractional order system. J. Frankl. Inst. 350 (7) (2013)
Soumitro Banerjee, T. K. Sunil Kumar, Jayanta Pal, Dinkar Prasad
Controller Design for Large-Gap Control of Electromagnetically Levitated System by Using an Optimization Technique. IEEE Trans. Control. Syst. Technol. 16 (3) (2008)