Impact of Genetic Algorithm on Low Power QCA Logic Circuit with Regular Clocking.
Amit Kumar PramanikJayanta PalBibhash SenPublished in: ASCAT (2022)
Keyphrases
- low power
- power dissipation
- logic circuits
- cmos technology
- genetic algorithm
- power consumption
- high speed
- low cost
- delay insensitive
- single chip
- logic synthesis
- digital signal processing
- vlsi circuits
- low voltage
- gate array
- high power
- low power consumption
- power reduction
- vlsi architecture
- wireless transmission
- mixed signal
- asynchronous circuits
- cellular automata
- nm technology
- power saving
- design methodology
- signal processor
- image processing