Anni Lu

Publication Activity (10 Years)

Years Active: 2020-2024
Publications (10 Years): 20

Top Topics

Memory Management

Vlsi Implementation

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE J. Emerg. Sel. Topics Circuits Syst.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Yuan-Chun Luo, James Read, Anni Lu, Shimeng Yu
A Cross-layer Framework for Design Space and Variation Analysis of Non-Volatile Ferroelectric Capacitor-Based Compute-in-Memory Accelerators. ASPDAC (2024)
Po-Kai Hsu, Vaidehi Garg, Anni Lu, Shimeng Yu
A Heterogeneous Platform for 3D NAND-Based In-Memory Hyperdimensional Computing Engine for Genome Sequencing Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (4) (2024)
Junmo Lee, Anni Lu, Wantong Li, Shimeng Yu
NeuroSim V1.4: Extending Technology Support for Digital Compute-in-Memory Toward 1nm Node. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (4) (2024)
Minah Lee, Anni Lu, Mandovi Mukherjee, Shimeng Yu, Saibal Mukhopadhyay
CLUE: Cross-Layer Uncertainty Estimator for Reliable Neural Perception using Processing-in-Memory Accelerators. IJCNN (2023)
Anni Lu, Jae Hur, Yuan-Chun Luo, Hai Li, Dmitri E. Nikonov, Ian A. Young, Yang-Kyu Choi, Shimeng Yu
Scalable In-Memory Clustered Annealer With Temporal Noise of Charge Trap Transistor for Large Scale Travelling Salesman Problems. IEEE J. Emerg. Sel. Topics Circuits Syst. 13 (1) (2023)
Gihun Choe, Prasanna Venkatesan Ravindran, Anni Lu, Jae Hur, Maximilian Lederer, André Reck, Sarah Lombardo, Nashrah Afroze, Josh Kacher, Asif Islam Khan, Shimeng Yu
Machine Learning Assisted Statistical Variation Analysis of Ferroelectric Transistors: From Experimental Metrology to Predictive Modeling. VLSI Technology and Circuits (2022)
Yuan-Chun Luo, Anni Lu, Jae Hur, Shaolan Li, Shimeng Yu
Design and Optimization of Non-Volatile Capacitive Crossbar Array for In-Memory Computing. IEEE Trans. Circuits Syst. II Express Briefs 69 (3) (2022)
Jae Hur, Yuan-Chun Luo, Anni Lu, Tzu-Han Wang, Shaolan Li, Asif Islam Khan, Shimeng Yu
Nonvolatile Capacitive Crossbar Array for In-Memory Computing. Adv. Intell. Syst. 4 (8) (2022)
Saurabh Dash, Yandong Luo, Anni Lu, Shimeng Yu, Saibal Mukhopadhyay
Robust Processing-In-Memory With Multibit ReRAM Using Hessian-Driven Mixed-Precision Computation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (4) (2022)
Anni Lu, Xiaochen Peng, Wantong Li, Hongwu Jiang, Shimeng Yu
NeuroSim Validation with 40nm RRAM Compute-in-Memory Macro. AICAS (2021)
Shimeng Yu, Wonbo Shim, Jae Hur, Yuan-chun Luo, Gihun Choe, Wantong Li, Anni Lu, Xiaochen Peng
Compute-in-Memory: From Device Innovation to 3D System Integration. ESSDERC (2021)
Beomseok Kang, Anni Lu, Yun Long, Daehyun Kim, Shimeng Yu, Saibal Mukhopadhyay
Genetic Algorithm-Based Energy-Aware CNN Quantization for Processing-In-Memory Architecture. IEEE J. Emerg. Sel. Topics Circuits Syst. 11 (4) (2021)
Xiaochen Peng, Shanshi Huang, Hongwu Jiang, Anni Lu, Shimeng Yu
DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-Chip Training. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (11) (2021)
Anni Lu, Xiaochen Peng, Yandong Luo, Shanshi Huang, Shimeng Yu
A Runtime Reconfigurable Design of Compute-in-Memory based Hardware Accelerator. DATE (2021)
Anni Lu, Xiaochen Peng, Wantong Li, Hongwu Jiang, Shimeng Yu
NeuroSim Simulator for Compute-in-Memory Hardware Accelerator: Validation and Benchmark. Frontiers Artif. Intell. 4 (2021)
Yuan-Chun Luo, Anni Lu, Jae Hur, Shaolan Li, Shimeng Yu
Design of Non-volatile Capacitive Crossbar Array for In-Memory Computing. IMW (2021)
Anni Lu, Xiaochen Peng, Yandong Luo, Shanshi Huang, Shimeng Yu
A Runtime Reconfigurable Design of Compute-in-Memory-Based Hardware Accelerator for Deep Learning Inference. ACM Trans. Design Autom. Electr. Syst. 26 (6) (2021)
Anni Lu, Xiaochen Peng, Shimeng Yu
Compute-in-RRAM with Limited On-chip Resources. AICAS (2021)
Xiaochen Peng, Shanshi Huang, Hongwu Jiang, Anni Lu, Shimeng Yu
DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-chip Training. CoRR (2020)
Anni Lu, Xiaochen Peng, Yandong Luo, Shimeng Yu
Benchmark of the Compute-in-Memory-Based DNN Accelerator With Area Constraint. IEEE Trans. Very Large Scale Integr. Syst. 28 (9) (2020)