Yuan-Chun Luo

Publication Activity (10 Years)

Years Active: 2018-2024
Publications (10 Years): 11

Top Topics

Memory Management

Top Venues

IEEE J. Emerg. Sel. Topics Circuits Syst.

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Tae-Hyeon Kim, Yuan-Chun Luo, Omkar Phadke, James Read, Shimeng Yu
Engineering nvCap From FEOL to BEOL with Ferroelectric Small-signal Non-destructive Read. IMW (2024)
Yuan-Chun Luo, James Read, Anni Lu, Shimeng Yu
A Cross-layer Framework for Design Space and Variation Analysis of Non-Volatile Ferroelectric Capacitor-Based Compute-in-Memory Accelerators. ASPDAC (2024)
Anni Lu, Jae Hur, Yuan-Chun Luo, Hai Li, Dmitri E. Nikonov, Ian A. Young, Yang-Kyu Choi, Shimeng Yu
Scalable In-Memory Clustered Annealer With Temporal Noise of Charge Trap Transistor for Large Scale Travelling Salesman Problems. IEEE J. Emerg. Sel. Topics Circuits Syst. 13 (1) (2023)
Yuan-Chun Luo, Anni Lu, Jae Hur, Shaolan Li, Shimeng Yu
Design and Optimization of Non-Volatile Capacitive Crossbar Array for In-Memory Computing. IEEE Trans. Circuits Syst. II Express Briefs 69 (3) (2022)
Jae Hur, Yuan-Chun Luo, Anni Lu, Tzu-Han Wang, Shaolan Li, Asif Islam Khan, Shimeng Yu
Nonvolatile Capacitive Crossbar Array for In-Memory Computing. Adv. Intell. Syst. 4 (8) (2022)
Yandong Luo, Yuan-Chun Luo, Shimeng Yu
A Ferroelectric-Based Volatile/Non-Volatile Dual-Mode Buffer Memory for Deep Neural Network Accelerators. IEEE Trans. Computers 71 (9) (2022)
Yandong Luo, Yuan-Chun Luo, Shimeng Yu
A FeRAM based Volatile/Non-volatile Dual-mode Buffer Memory for Deep Neural Network Training. DATE (2021)
Yuan-Chun Luo, Anni Lu, Jae Hur, Shaolan Li, Shimeng Yu
Design of Non-volatile Capacitive Crossbar Array for In-Memory Computing. IMW (2021)
Jae Hur, Yuan-Chun Luo, Zheng Wang, Wonbo Shim, Asif Islam Khan, Shimeng Yu
A Technology Path for Scaling Embedded FeRAM to 28nm with 2T1C Structure. IMW (2021)
Yuan-Chun Luo, Jae Hur, Panni Wang, Asif Islam Khan, Shimeng Yu
Modeling Multi-states in Ferroelectric Tunnel Junction. DRC (2020)
Ren-Shuo Liu, Yun-Chen Lo, Yuan-Chun Luo, Chih-Yu Shen, Cheng-Ju Lee
DrowsyNet: Convolutional neural networks with runtime power-accuracy tunability using inference-stage dropout. VLSI-DAT (2018)