Anh-Tuan Hoang

Publication Activity (10 Years)

Years Active: 2011-2024
Publications (10 Years): 4

Top Topics

Recognition Algorithm

Fpga Implementation

Traffic Sign Detection

Top Venues

ACM Trans. Reconfigurable Technol. Syst.

IACR Trans. Cryptogr. Hardw. Embed. Syst.

Publications

Anh-Tuan Hoang, Mark Kennaway, Dung Tuan Pham, Thai Son Mai, Ayesha Khalid, Ciara Rafferty, Máire O'Neill
Deep Learning Enhanced Side Channel Analysis on CRYSTALS-Kyber. ISQED (2024)
Anh-Tuan Hoang, Neil Hanley, Ayesha Khalid, Dur-e-Shahwar Kundi, Máire O'Neill
Stacked Ensemble Models Evaluation on DL Based SCA. ICSBT/SECRYPT (Revised Selected Papers) (2022)
Anh-Tuan Hoang, Neil Hanley, Ayesha Khalid, Dur-e-Shahwar Kundi, Máire O'Neill
Stacked Ensemble Model for Enhancing the DL based SCA. SECRYPT (2022)
Anh-Tuan Hoang, Neil Hanley, Máire O'Neill
Plaintext: A Missing Feature for Enhancing the Power of Deep Learning in Side-Channel Analysis? Breaking multiple layers of side-channel countermeasures. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2020 (4) (2020)
Takumi Okamoto, Tetsushi Koide, Koki Sugi, Tatsuya Shimizu, Anh-Tuan Hoang, Toru Tamaki, Bisser Raytchev, Kazufumi Kaneda, Yoko Kominami, Shigeto Yoshida, Hiroshi Mieno, Shinji Tanaka
Image segmentation of pyramid style identifier based on Support Vector Machine for colorectal endoscopic images. EMBC (2015)
Tetsushi Koide, Anh-Tuan Hoang, Takumi Okamoto, Satoshi Shigemi, Tsubasa Mishima, Toru Tamaki, Bisser Raytchev, Kazufumi Kaneda, Yoko Kominami, Rie Miyaki, Taiji Matsuo, Shigeto Yoshida, Shinji Tanaka
FPGA implementation of type identifier for colorectal endoscopie images with NBI magnification. APCCAS (2014)
Anh-Tuan Hoang, Takeshi Fujino
Intra-Masking Dual-Rail Memory on LUT Implementation for SCA-Resistant AES on FPGA. ACM Trans. Reconfigurable Technol. Syst. 7 (2) (2014)
Anh-Tuan Hoang, Tetsushi Koide, Masaharu Yamamoto, Mutsumi Omori
Pipeline scanning architecture with computation reduction for rectangle pattern matching in real-time traffic sign detection. ISCAS (2014)
Anh-Tuan Hoang, Tetsushi Koide, Masaharu Yamamoto
Low cost hardware implementation for traffic sign detection system. APCCAS (2014)
Masaharu Yamamoto, Anh-Tuan Hoang, Mutsumi Omori, Tetsushi Koide
Compact hardware oriented number recognition algorithm for real-time speed traffic-sign recognition. ISCAS (2014)
Tsubasa Mishima, Satoshi Shigemi, Anh-Tuan Hoang, Tetsushi Koide, Toru Tamaki, Bisser Raytchev, Kazufumi Kaneda, Yoko Kominami, Rie Miyaki, Taiji Matsuo, Shigeto Yoshida, Shinji Tanaka
FPGA implementation of feature extraction for colorectal endoscopic images with NBI magnification. ISCAS (2014)
Anh-Tuan Hoang, Takeshi Fujino
Hybrid masking using intra-masking dual-rail memory on LUT for SCA-Resistant AES implementation on FPGA (abstract only). FPGA (2013)
Anh-Tuan Hoang, Takeshi Fujino
Intra-masking dual-rail memory on LUT implementation for tamper-resistant AES on FPGA. FPGA (2012)
Hiroki Ito, Mitsuru Shiozaki, Anh-Tuan Hoang, Takeshi Fujino
Efficient DPA-Resistance Verification Method with Smaller Number of Power Traces on AES Cryptographic Circuit. DSD (2012)
Katsuhiko Iwai, Mitsuru Shiozaki, Anh-Tuan Hoang, Kenji Kojima, Takeshi Fujino
Implementation and verification of DPA-resistant cryptographic DES circuit using Domino-RSL. HOST (2011)