Aditya Japa

Publication Activity (10 Years)

Years Active: 2016-2024
Publications (10 Years): 16

Top Topics

Energy Efficient

Reverse Engineer

Top Venues

IET Circuits Devices Syst.

Microelectron. J.

Int. J. Circuit Theory Appl.

Publications

Venu Birudu, Tirumalarao Kadiyam, Koteswararao Penumalli, Aditya Japa, Sushma Nirmala Sambatur, Chongyan Gu, Siva Sankar Yellampalli, Ramesh Vaddi
Negative Capacitance FET 8T SRAM Computing in-Memory based Logic Design for Energy Efficient AI Edge Devices. ISCAS (2024)
Aditya Japa, Jack Miskelly, Yijun Cui, Máire O'Neill, Chongyan Gu
A Novel Methodology for Processor based PUF in Approximate Computing. ISCAS (2024)
Aditya Japa, Jiliang Zhang, Weiqiang Liu, Chongyan Gu
Processor based Intrinsic PUF Design for Approximate Computing: Faith or Reality? AsianHOST (2023)
Renuka Chowdary Bheemana, Aditya Japa, Siva Sankar Yellampalli, Ramesh Vaddi
Negative capacitance FET based energy efficient and DPA attack resilient ultra-light weight block cipher design. Microelectron. J. 133 (2023)
Kunal Kranti Das, Aditya Japa, Deepika Gupta
A Reconfigurable Arbiter PUF Based on VGSOT MTJ. VDAT (2022)
Renuka Chowdary Bheemana, Aditya Japa, Siva Sankar Yellampalli, Ramesh Vaddi
Negative capacitance FETs for energy efficient and hardware secure logic designs. Microelectron. J. 119 (2022)
Renuka Chowdary Bheemana, Aditya Japa, Siva Sankar Yellampalli, Ramesh Vaddi
Steep Switching NCFET based Logic for Future Energy Efficient Electronics. iSES (2021)
Aditya Japa, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Ramesh Vaddi
Tunnel FET-based ultra-lightweight reconfigurable TRNG and PUF design for resource-constrained internet of things. Int. J. Circuit Theory Appl. 49 (8) (2021)
Aditya Japa, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Ramesh Vaddi
Tunnel FET-based ultralow-power and hardware-secure circuit design considering p-i-n forward leakage. Int. J. Circuit Theory Appl. 48 (4) (2020)
Aditya Japa, Palagani Yellappa, Venkateswarlu Gonuguntla, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Jun Rim Choi, Ramesh Vaddi
A Low Voltage Discriminant Circuit for Pattern Recognition Exploiting the Asymmetrical Characteristics of Tunnel FET. ISCAS (2020)
Aditya Japa, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Ramesh Vaddi
Low area overhead DPA countermeasure exploiting tunnel transistor-based random number generator. IET Circuits Devices Syst. 14 (5) (2020)
Aditya Japa, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Ramesh Vaddi
Tunnel FET ambipolarity-based energy efficient and robust true random number generator against reverse engineering attacks. IET Circuits Devices Syst. 13 (5) (2019)
Aditya Japa, T. Nagateja, Santosh Kumar Vishvakarma, Palagani Yellappa, Jun Rim Choi, Ramesh Vaddi
Tunneling Field Effect Transistors for Enhancing Energy Efficiency and Hardware Security of IoT Platforms: Challenges and Opportunities. ISCAS (2018)
Aditya Japa, Harshita Vallabhaneni, Ramesh Vaddi
Exploiting Characteristics of Steep Slope Tunnel Transistors Towards Energy Efficient and Reliable Buffer Designs for IoT SoCs. VDAT (2017)
Aditya Japa, T. Nagateja, Ramesh Vaddi
Tunneling Field Effect Transistors for Energy Efficient Logic, Sensor Interface and 3D IC Circuits for IoT Platforms. iNIS (2017)
Aditya Japa, Harshita Vallabhaneni, Ramesh Vaddi
Reliability enhancement of a steep slope tunnel transistor based ring oscillator designs with circuit interaction. IET Circuits Devices Syst. 10 (6) (2016)