Siva Sankar Yellampalli

Publication Activity (10 Years)

Years Active: 2003-2024
Publications (10 Years): 16

Top Topics

Energy Efficient

Cmos Technology

Top Venues

Microelectron. J.

Publications

Rahul Gowtham Poola, P. L. Lahari, Siva Sankar Yellampalli
SyntDiaNet: Integrating feature extraction, transfer learning and classifier-embedded generative adversarial network for advanced pneumonia diagnosis. Multim. Tools Appl. 83 (27) (2024)
Venu Birudu, Tirumalarao Kadiyam, Koteswararao Penumalli, Aditya Japa, Sushma Nirmala Sambatur, Chongyan Gu, Siva Sankar Yellampalli, Ramesh Vaddi
Negative Capacitance FET 8T SRAM Computing in-Memory based Logic Design for Energy Efficient AI Edge Devices. ISCAS (2024)
Venu Birudu, Siva Sankar Yellampalli, Ramesh Vaddi
A negative capacitance FET based energy efficient 6T SRAM computing-in-memory (CiM) cell design for deep neural networks. Microelectron. J. 139 (2023)
Renuka Chowdary Bheemana, Aditya Japa, Siva Sankar Yellampalli, Ramesh Vaddi
Negative capacitance FET based energy efficient and DPA attack resilient ultra-light weight block cipher design. Microelectron. J. 133 (2023)
Renuka Chowdary Bheemana, Aditya Japa, Siva Sankar Yellampalli, Ramesh Vaddi
Negative capacitance FETs for energy efficient and hardware secure logic designs. Microelectron. J. 119 (2022)
Venu Birudu, Siva Sankar Yellampalli, Ramesh Vaddi
Design and Exploration of Negative Capacitance FETs for Energy Efficient SRAM based In-Memory XNOR/Input and Weight Product Operation for Deep Neural Networks. iSES (2022)
Renuka Chowdary Bheemana, Aditya Japa, Siva Sankar Yellampalli, Ramesh Vaddi
Steep Switching NCFET based Logic for Future Energy Efficient Electronics. iSES (2021)
Sameeksha Konakalla, Lakshmi Vyshnavi Kunchala, Siva Sankar Yellampalli
Smart Agriculture using IoT & Filtering Technology. ICCCNT (2021)
Parshal Chitrakar, Yoganand Biradavolu, Siva Sankar Yellampalli
GPS and LoRa module Based Safety Alert system. RFID-TA (2021)
P. L. Lahari, Siva Sankar Yellampalli, Ramesh Vaddi
Systolic Array based Multiply Accumulation Unit for IoT Edge Accelerators. iSES (2021)
Nanda Kishora Holla, Siva Sankar Yellampalli
Smart Receivers with Modular and Multifunctional Front-End Blocks: The Benefits of Using Programmable Modulators and Demodulators. IEEE Consumer Electron. Mag. 8 (1) (2019)
Munishamanna Rithesh, G. Harish, B. V. Bhargav Ram, Siva Sankar Yellampalli
Detection and analysis of hardware trojan using scan chain method. VDAT (2015)
Prakruthi T. G., Siva Sankar Yellampalli
Design and implementation of sample and hold circuit in 180nm CMOS technology. ICACCI (2015)
Favoureen Swer, V. Pradeep, Siva Sankar Yellampalli
Analog BIST for Capacitive MEMS Sensor using PLL. WCI (2015)
M. R. Gowthami, G. Harish, B. V. Bhargav Ram, Siva Sankar Yellampalli
Modified low power scan based technique. VDAT (2015)
N. Ravi Kiran, G. Harish, A. Karthik, Siva Sankar Yellampalli
Low power and hardware cost STUMPS BIST. VDAT (2015)
P. Kavyashree, Siva Sankar Yellampalli
The Design of Ultra Low Power CMOS CGLNA in Nanometer Technology. ISED (2014)
Dwaraka N. Oruganti, Siva Sankar Yellampalli
Design of power efficient SPI interface. ICACCI (2014)
Rajiv Soundararajan, Ashok Srivastava, Siva Sankar Yellampalli
Testing of a CMOS Digital-to-Analog Converter Considering Process Variation Effects. Circuits Syst. 2 (3) (2011)
Jong-Kook Kim, Sameer Shivle, Howard Jay Siegel, Anthony A. Maciejewski, Tracy D. Braun, Myron Schneider, Sonja Tideman, Ramakrishna Chitta, Raheleh B. Dilmaghani, Rohit Joshi, Aditya Kaul, Ashish Sharma, Siddhartha Sripada, Praveen Vangari, Siva Sankar Yellampalli
Dynamic Mapping in a Heterogeneous Environment with Tasks Having Priorities and Multiple Deadlines. IPDPS (2003)