Harshita Vallabhaneni

Publication Activity (10 Years)

Years Active: 2016-2017
Publications (10 Years): 2

Top Topics

Equivalent Circuit

Data Aggregation

Energy Efficient

Multi Core Architecture

Top Venues

IET Circuits Devices Syst.

Publications

Aditya Japa, Harshita Vallabhaneni, Ramesh Vaddi
Exploiting Characteristics of Steep Slope Tunnel Transistors Towards Energy Efficient and Reliable Buffer Designs for IoT SoCs. VDAT (2017)
Aditya Japa, Harshita Vallabhaneni, Ramesh Vaddi
Reliability enhancement of a steep slope tunnel transistor based ring oscillator designs with circuit interaction. IET Circuits Devices Syst. 10 (6) (2016)