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Fault Simulation and Test Generation for Transistor Shorts Using Stuck-at Test Tools.
Yoshinobu Higami
Kewal K. Saluja
Hiroshi Takahashi
Shin-ya Kobayashi
Yuzo Takamatsu
Published in:
IEICE Trans. Inf. Syst. (2008)
Keyphrases
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test generation
test cases
test sequences
symbolic execution
software testing
design automation
code coverage
static analysis
mutation testing
quality assurance
fault detection
high speed
fault diagnosis
integrated circuit
machine learning
decision trees
neural network