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Test Configuration Generation for FPGA Logic Cells.
Michel Renovell
Jean-Michel Portal
Joan Figueras
Yervant Zorian
Published in:
LATW (2000)
Keyphrases
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neural network
real time
built in self test
statistical tests
modal logic
test data
logic programming
statistical significance
hardware architecture
high speed
software systems
test cases
hardware implementation
multi valued
predicate logic
real time image processing
proof theory
fpga hardware