On test generation for transition faults with minimized peak power dissipation.
Wei LiSudhakar M. ReddyIrith PomeranzPublished in: DAC (2004)
Keyphrases
- test generation
- power reduction
- test cases
- power dissipation
- mutation testing
- power consumption
- low power
- test sequences
- design automation
- power saving
- software testing
- cmos technology
- fault diagnosis
- quality assurance
- short circuit
- static analysis
- low cost
- digital signal processing
- nm technology
- finite state machines
- high speed
- logic circuits
- test suite
- machine learning
- database