PROOFS: a fast, memory-efficient sequential circuit fault simulator.
Thomas M. NiermannWu-Tung ChengJanak H. PatelPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1992)
Keyphrases
- memory efficient
- fault diagnosis
- fault detection
- high speed
- analog circuits
- external memory
- short circuit
- simulation model
- circuit design
- multiple sequence alignment
- mathematical proofs
- search algorithm
- failure modes
- pattern growth
- iterative deepening
- theorem proving
- digital circuits
- computational biology
- branch and bound
- fault model
- analog vlsi
- multiple faults
- orders of magnitude
- expert systems