Off-Line Testing of Delay Faults in NoC Interconnects.

Tomas Bengtsson Artur Jutman Shashi Kumar Raimund Ubar Zebo Peng

Published in: DSD (2006)

Keyphrases

test cases
power dissipation
network on chip
fault model
fault diagnosis
input output
software testing
low cost
power consumption
test generation
neural network
model based diagnosis
fault detection
test sequences
cmos technology
testing process