Test Generation of Stuck-open Faults Using Stuck-at Test Sets in CMOS Combinational Circuits.
Hyung Ki LeeDong Sam HaKwanghyun KimPublished in: DAC (1989)
Keyphrases
- test cases
- test generation
- test set
- circuit design
- test sequences
- high speed
- test data
- software testing
- design automation
- mutation testing
- symbolic execution
- analog vlsi
- training set
- delay insensitive
- error rate
- test suite
- asynchronous circuits
- logic circuits
- vlsi circuits
- cmos technology
- training data
- chip design
- low power
- power consumption
- fault diagnosis
- learning algorithm