On-chip test generation for combinational circuits by LFSR modification.
Shambhu J. UpadhyayaLiang-Chi ChenPublished in: ICCAD (1993)
Keyphrases
- test generation
- shift register
- high speed
- analog vlsi
- logic circuits
- circuit design
- test cases
- chip design
- power dissipation
- low power
- symbolic execution
- test sequences
- cmos technology
- low cost
- asynchronous circuits
- quality assurance
- static analysis
- design automation
- mutation testing
- high density
- software testing
- mixed signal
- random number generator
- random access memory
- database
- power consumption
- built in self test
- digital circuits
- focal plane
- hardware implementation
- test data generation
- relational databases
- data sets