Zhe Wang

Publication Activity (10 Years)

Years Active: 2013-2019
Publications (10 Years): 23

Top Topics

Multicore Processors

Optical Networks

Parallel Algorithm

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Zhongyuan Tian, Zhe Wang, Jiang Xu, Haoran Li, Peng Yang, Rafael Kioji Vivas Maeda
Collaborative Power Management Through Knowledge Sharing Among Multiple Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (7) (2019)
Zhongyuan Tian, Zhe Wang, Haoran Li, Peng Yang, Rafael Kioji Vivas Maeda, Jiang Xu
Multi-device collaborative management through knowledge sharing. ASP-DAC (2018)
Weichen Liu, Zhe Wang, Peng Yang, Jiang Xu, Bin Li, Ravi R. Iyer, Ramesh Illikkal
A Systematic and Realistic Network-on-Chip Traffic Modeling and Generation Technique for Emerging Many-Core Systems. IEEE Trans. Multi Scale Comput. Syst. 4 (2) (2018)
Haoran Li, Jiang Xu, Zhe Wang, Rafael K. V. Maeda, Peng Yang, Zhongyuan Tian
Workload-Aware Adaptive Power Delivery System Management for Many-Core Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (10) (2018)
Zhe Wang, Zhongyuan Tian, Jiang Xu, Rafael K. V. Maeda, Haoran Li, Peng Yang, Zhehui Wang, Luan H. K. Duong, Zhifei Wang, Xuanqi Chen
Modular reinforcement learning for self-adaptive energy efficiency optimization in multicore system. ASP-DAC (2017)
Haoran Li, Xuan Wang, Jiang Xu, Zhe Wang, Rafael K. V. Maeda, Zhehui Wang, Peng Yang, Luan H. K. Duong, Zhifei Wang
Energy-Efficient Power Delivery System Paradigms for Many-Core Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (3) (2017)
Rafael K. V. Maeda, Qiong Cai, Jiang Xu, Zhe Wang, Zhongyuan Tian
Fast and Accurate Exploration of Multi-level Caches Using Hierarchical Reuse Distance. HPCA (2017)
Haoran Li, Jiang Xu, Zhe Wang, Peng Yang, Rafael K. V. Maeda, Zhongyuan Tian
Adaptive power delivery system management for many-core processors with on/off-chip voltage regulators. DATE (2017)
Zhehui Wang, Zhengbin Pang, Peng Yang, Jiang Xu, Xuanqi Chen, Rafael K. V. Maeda, Zhifei Wang, Luan H. K. Duong, Haoran Li, Zhe Wang
MOCA: an Inter/Intra-Chip Optical Network for Memory. DAC (2017)
Luan H. K. Duong, Zhehui Wang, Mahdi Nikdast, Jiang Xu, Peng Yang, Zhifei Wang, Zhe Wang, Rafael K. V. Maeda, Haoran Li, Xuan Wang, Sébastien Le Beux, Yvain Thonnart
Coherent and Incoherent Crosstalk Noise Analyses in Interchip/Intrachip Optical Interconnection Networks. IEEE Trans. Very Large Scale Integr. Syst. 24 (7) (2016)
Zhe Wang, Xuan Wang, Jiang Xu, Haoran Li, Rafael K. V. Maeda, Zhehui Wang, Peng Yang, Luan H. K. Duong, Zhifei Wang
An Adaptive Process-Variation-Aware Technique for Power-Gating-Induced Power/Ground Noise Mitigation in MPSoC. IEEE Trans. Very Large Scale Integr. Syst. 24 (12) (2016)
Xuan Wang, Jiang Xu, Zhe Wang, Haoran Li, Peng Yang, Luan H. K. Duong, Rafael K. V. Maeda, Zhifei Wang
Alleviate Chip Pin Constraint for Multicore Processor by On/Off-Chip Power Delivery System Codesign. ACM J. Emerg. Technol. Comput. Syst. 13 (2) (2016)
Zhehui Wang, Jiang Xu, Peng Yang, Xuan Wang, Zhe Wang, Luan Huu Kinh Duong, Zhifei Wang, Rafael Kioji Vivas Maeda, Haoran Li
Improve Chip Pin Performance Using Optical Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 24 (4) (2016)
Rafael K. V. Maeda, Peng Yang, Xiaowen Wu, Zhe Wang, Jiang Xu, Zhehui Wang, Haoran Li, Luan H. K. Duong, Zhifei Wang
JADE: a Heterogeneous Multiprocessor System Simulation Platform Using Recorded and Statistical Application Models. AISTECS@HiPEAC (2016)
Zhehui Wang, Jiang Xu, Peng Yang, Luan Huu Kinh Duong, Zhifei Wang, Xuan Wang, Zhe Wang, Haoran Li, Rafael Kioji Vivas Maeda
A Holistic Modeling and Analysis of Optical-Electrical Interfaces for Inter/Intra-chip Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 24 (7) (2016)
Xiaowen Wu, Jiang Xu, Yaoyao Ye, Xuan Wang, Mahdi Nikdast, Zhehui Wang, Zhe Wang
An Inter/Intra-Chip Optical Network for Manycore Processors. IEEE Trans. Very Large Scale Integr. Syst. 23 (4) (2015)
Xuan Wang, Jiang Xu, Zhe Wang, Kevin J. Chen, Xiaowen Wu, Zhehui Wang, Peng Yang, Luan H. K. Duong
An Analytical Study of Power Delivery Systems for Many-Core Processors Using On-Chip and Off-Chip Voltage Regulators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (9) (2015)
Mahdi Nikdast, Jiang Xu, Luan H. K. Duong, Xiaowen Wu, Zhehui Wang, Xuan Wang, Zhe Wang
Fat-Tree-Based Optical Interconnection Networks Under Crosstalk Noise Constraint. IEEE Trans. Very Large Scale Integr. Syst. 23 (1) (2015)
Xuan Wang, Jiang Xu, Wei Zhang, Xiaowen Wu, Yaoyao Ye, Zhehui Wang, Mahdi Nikdast, Zhe Wang
Actively Alleviate Power Gating-Induced Power/Ground Noise Using Parasitic Capacitance of On-Chip Memories in MPSoC. IEEE Trans. Very Large Scale Integr. Syst. 23 (2) (2015)
Zhe Wang, Xuan Wang, Jiang Xu, Xiaowen Wu, Zhehui Wang, Peng Yang, Luan H. K. Duong, Haoran Li, Rafael Kioji Vivas Maeda, Zhifei Wang
Adaptively tolerate power-gating-induced power/ground noise under process variations. DATE (2015)
Chuan Tang, Dan Liu, Zuocheng Xing, Peng Yang, Zhe Wang, Jiang Xu
Memory Access Analysis of Many-core System with Abundant Bandwidth. MCSoC (2015)
Zhehui Wang, Jiang Xu, Peng Yang, Xuan Wang, Zhe Wang, Luan H. K. Duong, Zhifei Wang, Haoran Li, Rafael Kioji Vivas Maeda, Xiaowen Wu, Yaoyao Ye, Qinfen Hao
Alleviate chip I/O pin constraints for multicore processors through optical interconnects. ASP-DAC (2015)
Mahdi Nikdast, Jiang Xu, Luan Huu Kinh Duong, Xiaowen Wu, Xuan Wang, Zhehui Wang, Zhe Wang, Peng Yang, Yaoyao Ye, Qinfen Hao
Crosstalk Noise in WDM-Based Optical Networks-on-Chip: A Formal Study and Comparison. IEEE Trans. Very Large Scale Integr. Syst. 23 (11) (2015)
Zhe Wang, Weichen Liu, Jiang Xu, Bin Li, Ravi R. Iyer, Ramesh Illikkal, Xiaowen Wu, Wai Ho Mow, Wenjing Ye
A Case Study on the Communication and Computation Behaviors of Real Applications in NoC-Based MPSoCs. ISVLSI (2014)
Xuan Wang, Jiang Xu, Zhe Wang, Kevin J. Chen, Xiaowen Wu, Zhehui Wang
Characterizing power delivery systems with on/off-chip voltage regulators for many-core processors. DATE (2014)
Zhehui Wang, Jiang Xu, Xiaowen Wu, Yaoyao Ye, Wei Zhang, Mahdi Nikdast, Xuan Wang, Zhe Wang
Floorplan Optimization of Fat-Tree-Based Networks-on-Chip for Chip Multiprocessors. IEEE Trans. Computers 63 (6) (2014)
Yaoyao Ye, Zhehui Wang, Peng Yang, Jiang Xu, Xiaowen Wu, Xuan Wang, Mahdi Nikdast, Zhe Wang, Luan H. K. Duong
System-Level Modeling and Analysis of Thermal Effects in WDM-Based Optical Networks-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (11) (2014)
Mahdi Nikdast, Jiang Xu, Xiaowen Wu, Wei Zhang, Yaoyao Ye, Xuan Wang, Zhehui Wang, Zhe Wang
Systematic Analysis of Crosstalk Noise in Folded-Torus-Based Optical Networks-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (3) (2014)
Zhe Wang, Weichen Liu, Jiang Xu, Xiaowen Wu, Zhehui Wang, Bin Li, Ravi R. Iyer, Ramesh Illikkal
A systematic network-on-chip traffic modeling and generation methodology. APCCAS (2014)
Xuan Wang, Jiang Xu, Wei Zhang, Xiaowen Wu, Yaoyao Ye, Zhehui Wang, Mahdi Nikdast, Zhe Wang
Active power-gating-induced power/ground noise alleviation using parasitic capacitance of on-chip memories. DATE (2013)
Yaoyao Ye, Xiaowen Wu, Jiang Xu, Mahdi Nikdast, Zhehui Wang, Xuan Wang, Zhe Wang
System-level analysis of mesh-based hybrid optical-electronic network-on-chip. ISCAS (2013)
Yaoyao Ye, Jiang Xu, Baihan Huang, Xiaowen Wu, Wei Zhang, Xuan Wang, Mahdi Nikdast, Zhehui Wang, Weichen Liu, Zhe Wang
3-D Mesh-Based Optical Network-on-Chip for Multiprocessor System-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (4) (2013)