Yuzheng Ding

Publication Activity (10 Years)

Years Active: 1992-2005
Publications (10 Years): 0

Publications

Yuzheng Ding, Peter Suaris, Nan-Chi Chou
The effect of post-layout pin permutation on timing. FPGA (2005)
Peter Suaris, Lung-Tien Liu, Yuzheng Ding, Nan-Chi Chou
Incremental physical resynthesis for timing optimization. FPGA (2004)
Jason Cong, Chang Wu, Yuzheng Ding
Cut Ranking and Pruning: Enabling a General and Efficient FPGA Mapping Solution. FPGA (1999)
Jason Cong, Yuzheng Ding
Combinational logic synthesis for LUT based field programmable gate arrays. ACM Trans. Design Autom. Electr. Syst. 1 (2) (1996)
Jason Cong, John Peck, Yuzheng Ding
RASP: A General Logic Synthesis System for SRAM-Based FPGAs. FPGA (1996)
Jason Cong, Yuzheng Ding
On Nominal Delay Minimization in LUT-based FPGA Technology Mapping. FPGA (1995)
Yuzheng Ding, Mark Allen Weiss
On the Complexity of Building an Interval Heap. Inf. Process. Lett. 50 (3) (1994)
Jason Cong, Yuzheng Ding, Tong Gao, Kuang-Chien Chen
LUT-based FPGA technology mapping under arbitrary net-delay models. Comput. Graph. 18 (4) (1994)
Jason Cong, Yuzheng Ding
On nominal delay minimization in LUT-based FPGA technology mapping. Integr. 18 (1) (1994)
Jason Cong, Yuzheng Ding
On area/depth trade-off in LUT-based FPGA technology mapping. IEEE Trans. Very Large Scale Integr. Syst. 2 (2) (1994)
Jason Cong, Yuzheng Ding
FlowMap: an optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (1) (1994)
Yuzheng Ding, Mark Allen Weiss
The K-D Heap: An Efficient Multi-dimensional Priority Queue. WADS (1993)
Jason Cong, Yuzheng Ding
On Area/Depth Trade-off in LUT-Based FPGA Technology Mapping. DAC (1993)
Jason Cong, Yuzheng Ding
Beyond the combinatorial limit in depth minimization for LUT-based FPGA designs. ICCAD (1993)
Yuzheng Ding, Mark Allen Weiss
The Relaxed min-max Heap. Acta Informatica 30 (3) (1993)
Jason Cong, Yuzheng Ding
An optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs. ICCAD (1992)
Yuzheng Ding, Mark Allen Weiss
Best case lower bounds for Heapsort. Computing 49 (1) (1992)
Kuang-Chien Chen, Jason Cong, Yuzheng Ding, Andrew B. Kahng, Peter Trajmar
DAG-Map: Graph-Based FPGA Technology Mapping for Delay Optimization. IEEE Des. Test Comput. 9 (3) (1992)
Jason Cong, Yuzheng Ding, Andrew B. Kahng, Peter Trajmar, Kuang-Chien Chen
An Improved Graph-Based FPGA Techology Mapping Algorithm For Delay Optimization. ICCD (1992)