Peter Suaris

Publication Activity (10 Years)

Years Active: 1994-2007
Publications (10 Years): 0

Publications

Shuo Zhou, Bo Yao, Hongyu Chen, Yi Zhu, Michael D. Hutton, Truman Collins, Sridhar Srinivasan, Nan-Chi Chou, Peter Suaris, Chung-Kuan Cheng
Efficient Timing Analysis With Known False Paths Using Biclique Covering. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (5) (2007)
Shuo Zhou, Bo Yao, Hongyu Chen, Yi Zhu, Chung-Kuan Cheng, Michael D. Hutton, Truman Collins, Sridhar Srinivasan, Nan-Chi Chou, Peter Suaris
Improving the efficiency of static timing analysis with false paths. ICCAD (2005)
Bo Yao, Hongyu Chen, Chung-Kuan Cheng, Nan-Chi Chou, Lung-Tien Liu, Peter Suaris
Unified quadratic programming approach for mixed mode placement. ISPD (2005)
Peter Suaris, Dongsheng Wang, Nan-Chi Chou
A practical cut-based physical retiming algorithm for field programmable gate arrays. ASP-DAC (2005)
Peter Suaris, Taeho Kgil, Keith A. Bowman, Vivek De, Trevor N. Mudge
Total power-optimal pipelining and parallel processing under process variations in nanometer technology. ICCAD (2005)
Yuzheng Ding, Peter Suaris, Nan-Chi Chou
The effect of post-layout pin permutation on timing. FPGA (2005)
Jianhua Liu, Michael Chang, Chung-Kuan Cheng, John F. MacDonald, Nan-Chi Chou, Peter Suaris
Fast adders in modern FPGAs. FPGA (2004)
Peter Suaris, Lung-Tien Liu, Yuzheng Ding, Nan-Chi Chou
Incremental physical resynthesis for timing optimization. FPGA (2004)
Dongsheng Wang, Peter Suaris, Nan-Chi Chou
A Practical ASIC Methdology for Flexible Clock Tree Synthesis with Routing Blockages. PATMOS (2003)
Peter Suaris, Dongsheng Wang, Pei-Ning Guo, Nan-Chi Chou
A physical retiming algorithm for field programmable gate arrays. FPGA (2003)
Hongyu Chen, Chung-Kuan Cheng, Nan-Chi Chou, Andrew B. Kahng, John F. MacDonald, Peter Suaris, Bo Yao, Zhengyong Zhu
An algebraic multigrid solver for analytical placement with layout based clustering. DAC (2003)
Chih-Wei Jim Chang, Chung-Kuan Cheng, Peter Suaris, Malgorzata Marek-Sadowska
Fast post-placement rewiring using easily detectable functional symmetries. DAC (2000)
Ajay J. Daga, Peter Suaris
Interface Timing Verification Drives System Design. DAC (1997)
Lalgudi N. Kannan, Peter Suaris, Hong-Gee Fang
A Methodology and Algorithms for Post-Placement Delay Optimization. DAC (1994)