Pei-Ning Guo

Publication Activity (10 Years)

Years Active: 1997-2003
Publications (10 Years): 0

Publications

Peter Suaris, Dongsheng Wang, Pei-Ning Guo, Nan-Chi Chou
A physical retiming algorithm for field programmable gate arrays. FPGA (2003)
Pei-Ning Guo, Toshihiko Takahashi, Chung-Kuan Cheng, Takeshi Yoshimura
Floorplanning using a tree representation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (2) (2001)
Jin Xu, Pei-Ning Guo, Chung-Kuan Cheng
Empirical Study of Block Placement by Cluster Refinement. VLSI Design 1999 (1) (1999)
Pei-Ning Guo, Chung-Kuan Cheng, Takeshi Yoshimura
An O-Tree Representation of Non-Slicing Floorplan and Its Applications. DAC (1999)
Jin Xu, Pei-Ning Guo, Chung-Kuan Cheng
Sequence-pair approach for rectilinear module placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18 (4) (1999)
Jin Xu, Pei-Ning Guo, Chung-Kuan Cheng
Rectilinear block placement using sequence-pair. ISPD (1998)
Jin Xu, Pei-Ning Guo, Chung-Kuan Cheng
Cluster Refinement for Block Placement. DAC (1997)