Yih-Chih Chou

Publication Activity (10 Years)

Years Active: 1998-2020
Publications (10 Years): 4

Top Topics

Dynamic Optimization

Convolutional Neural Network

Machine Learning

Top Venues

Publications

Wei-Tse Hung, Jun-Yang Huang, Yih-Chih Chou, Cheng-Hong Tsai, Mango Chia-Tso Chao
Transforming Global Routing Report into DRC Violation Map with Convolutional Neural Network. ISPD (2020)
Xuan-Xue Huang, Hsien-Chia Chen, Sheng-Wei Wang, Iris Hui-Ru Jiang, Yih-Chih Chou, Cheng-Hong Tsai
Dynamic IR-Drop ECO Optimization by Cell Movement with Current Waveform Staggering and Machine Learning Guidance. ICCAD (2020)
Yih-Chih Chou, Chien-Cheng Wu, Cheng-Hong Tsai
Clocking for HPC Design: Challenges and Experience Sharing. VLSI-DAT (2019)
Te-Jui Wang, Shih-Hsu Huang, Wei-Kai Cheng, Yih-Chih Chou
Top-level activity-driven clock tree synthesis with clock skew variation considered. ISCAS (2016)
Yih-Chih Chou, Youn-Long Lin
Effective enforcement of path-delay constraints inperformance-driven placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21 (1) (2002)
Yih-Chih Chou, Youn-Long Lin
A 3-step approach for performance-driven whole-chip routing. ASP-DAC (2001)
Yih-Chih Chou, Youn-Long Lin
A performance-driven standard-cell placer based on a modified force-directed algorithm. ISPD (2001)
Yih-Chih Chou, Youn-Long Lin
A graph-partitioning-based approach for multi-layer constrained via minimization. ICCAD (1998)
Tzu-Chieh Tien, Hsiao-Pin Su, Yu-Wen Tsay, Yih-Chih Chou, Youn-Long Lin
Integrating logic retiming and register placement. ICCAD (1998)