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A 3-step approach for performance-driven whole-chip routing.

Yih-Chih ChouYoun-Long Lin
Published in: ASP-DAC (2001)
Keyphrases
  • low cost
  • high speed
  • post processing
  • data driven
  • network topologies
  • real time
  • routing protocol
  • network topology
  • neural network
  • shortest path
  • routing algorithm
  • circuit design
  • programmable logic
  • inter domain